Theoretically the DDR controller supports 16 bit mode. But the mode has not been tested/verified/validated in P1025. We recommend you to not use 16 mode of P1025.
No it is not correct. The correct statement is " In asynchronous mode, if the ratio of the DDR data rate to the CCB clock rate is greater than 3 :1 ( i.e. DDR=3:CCB=1 ), than the DDR performance monitor statistic accuracy cannot be guaranteed."