For P1015, does DDRCLK and PCIe (SerDes) ref clock support a spread spectrum reference?
DDRCLK and PCIe (SerDes) ref clock support spread spectrum. Please note that since SGMII doesn't support spread spectrum, if SGMII is used on any SERDES lane, spread spectrum should not be applied to SERDES REF clock.
What are the DDRCLK and PCIe (SerDes) reference clock spread spectrum parameters for P1015?
DDRCLK and PCIe (SerDes) reference clock are designed to work with a spread spectrum clock (+0 to –0.5% spreading at 30–33 KHz rate is allowed), assuming both ends have same reference clock. For better results, a source without significant unintended modulation should be used.
