imx8mm - RGB888 MIPI driver

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imx8mm - RGB888 MIPI driver

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Contributor IV

I am using a custom imx8mm board with HDMI camera we are using HDMI to MIPI bridge IC from toshiba for converting HDMI camera signal to MIPI signals in RGB888 format. I have gone thru the mx6s_capture.c driver code and i see there is support for UYVY and YUYV but i am not able to see RGB888 format support, due to this i am getting skip frame 0 error massage, can you please help on this with an example code to customize for RGB888

Regards

Santhosh

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4 Replies

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NXP TechSupport
NXP TechSupport

we don't such sample code, you should add rgb888 in the mx6s_capture.c , and set the correct register, ry to enable PARALLEL24_EN in the CSICR18 and set TWO_8BIT_SENSOR to 0 in the CSICR3

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Contributor IV

Hello joanxie

We are using 4 csi data lane and we are bridge IC gives the stream in RGB888_1X24 format,

For the modification done below  i am getting the below error

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WARNING: from element /GstPipelin[ 84.553495] mx6s_vidioc_dqbuf
e:pipeline0/GstRtpJPEGPay:rtpjpegpay0: Invalid component
Additional debug info:
../../../git/gst/rtp/gstrtpjpegpay.c(596): gst_rtp_jpeg_pay_read_sof (): /GstPipeline:pipeline0/GstRtpJPEGPay:rtpjpegpay0
[ 84.919160] mx6s_videobuf_prepare: (vb=0xffff800077cd4a00) 0xffff000018851000 0
[ 84.926732] mx6s_vidioc_dqbuf
WARNING: from element /GstPipeline:pipeline0/GstRtpJPEGPay:rtpjpegpay0: Invalid component
Additional debug info:

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I have done the following modification, can you please verify the same and let me the corrections

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#define BIT_MIPI_DATA_FORMAT_RGB888 (0x24 << 25)

in mx6s_capture.c in the mx6s_configure_csi
{
.name = "RAWRGB24 (RGB24)", /*"xBGR32",*/ /*Added by santhosh*/ /*Note: Ref TC9590XBG datasheet page 33*/
.fourcc = V4L2_PIX_FMT_RGB24, /*V4L2_PIX_FMT_XBGR32,*/ /*https://community.nxp.com/message/1336744*/
.pixelformat = V4L2_PIX_FMT_RGB24, /*V4L2_PIX_FMT_XBGR32,*/
.mbus_code = MEDIA_BUS_FMT_RGB888_1X24,
.bpp = 3, /*4, */ /*8x3=24bpp 8x4-32bpp*//*Added by santhosh- this setting is to be tested*/
}, {
.name = "YUV 4:2:2 packed, CbYCrY", /*Added by santhosh */
.fourcc = V4L2_PIX_FMT_UYVY,
.pixelformat = V4L2_PIX_FMT_UYVY,
.mbus_code = MEDIA_BUS_FMT_UYVY8_1X16,
.bpp = 2, /*4,*/ /**/
}

in mx6s_capture.c in the mx6s_configure_csi
case V4L2_PIX_FMT_RGB24: //Added by santhosh

/*https://community.nxp.com/t5/i-MX-Processors/i-MX8M-Mini-MIPI-CSI-RGB888/m-p/1092973*/
/* For parallel 8-bit sensor input */
width = pix->width ; /*Added by santhoshThe 2 multiplication factor is used for testing this needs to verified*/
pr_err("santhosh Newly added V4L2_PIX_FMT_RGB24\n");
break;
case V4L2_PIX_FMT_RGB24: // Added by santhosh
cr18 |=BIT_MIPI_DATA_FORMAT_RGB888; // Added by santhosh imx8mm data sheet page number 3992
cr18 |= RGB888A_FORMAT_SEL; // 1 {data[23:0], 8’h0} Added by santhosh imx8mm data sheet page number 3992
cr18 |= BIT_PARALLEL24_EN;//input is parallel rgb888/yuv444 24bit,enabled this bit imx8mm data sheet pg 3992
pr_err("santhosh 2nd Newly added V4L2_PIX_FMT_RGB24\n"); // Added by santhosh
break;

#define MIPI_CSIS_ISPCFG_FMT_RGB888 (0x24 << 2)
in mxc_mipi_csi.c
{
.code = MEDIA_BUS_FMT_RGB888_1X24, /*Added by santhosh */
.fmt_reg = MIPI_CSIS_ISPCFG_FMT_RGB888,/*MIPI_CSIS_ISPCFG_MEM_FULL_GAP(4) ,*/
.data_alignment = 24, //32
}, {
.code = MEDIA_BUS_FMT_UYVY8_1X16, /*Added by santhosh */
.fmt_reg = MIPI_CSIS_ISPCFG_FMT_RGB888,/*MIPI_CSIS_ISPCFG_MEM_FULL_GAP(4),*/
.data_alignment = 16,
}, {
.code = MEDIA_BUS_FMT_UYVY8_2X8,
.fmt_reg = MIPI_CSIS_ISPCFG_FMT_RGB888,
.data_alignment = 16
}

----------------------------------------------------------------------------------------------------------------

Regards

Santhosh

 

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103 Views
Contributor IV

After adding In csi_enable(struct mx6s_csi_dev *csi_dev, int arg)
{
unsigned long cr = __raw_readl(csi_dev->regbase + CSI_CSICR18);

if (arg == 1)
cr |= BIT_CSI_ENABLE;
else
cr &= ~BIT_CSI_ENABLE;
+cr |= BIT_MIPI_DATA_FORMAT_RGB888;//Added by santhosh for testing
+cr |= BIT_PARALLEL24_EN; //Added by santhosh after the NXP patch // This is required -- verified after testing
+cr |= RGB888A_FORMAT_SEL;//Added by santhosh for testing
pr_err("csi_enable:0x%X\n",cr);
__raw_writel(cr, csi_dev->regbase + CSI_CSICR18);
}

 

I am able to get the some video stream, But the video is corrupted  what might be the issue

 

corrupted_image.png

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84 Views
NXP TechSupport
NXP TechSupport

how about testing by unit_test? try to use "mx6s_v4l2_capture.out" under  /unit_tests/V4L2/

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