how to configure the chip selection pins of DSPI @S32R45_LinuxBSP_35.0?

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how to configure the chip selection pins of DSPI @S32R45_LinuxBSP_35.0?

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amei_liu
Contributor II

Hi,the nxp expert.

I encountered an issue while porting code (S32R45_RSDK__1.0.0\Apps\RSDK_Multi_RFE_example_S32R45) as follows:

I checked the RSDK_Multi_RFE_example_S32R45 Source code, and found the SPI transceiver function RsdkRfeGlueSpiTransfer. But I didn't find any place in the code to operate on the chip select signal.

  • Is it because the Linux kernel driver implements chip selection signal operation when calling the ioctl function to transfer data?
  • Do I need to modify the s32r45 evb.dts file in BSP? If necessary, how can I modify it?

S32R45 and TEF82XX are connected through DSPI1. As follow:无标题.png

 

 

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petervlna
NXP TechSupport
NXP TechSupport

Hello,

I checked the RSDK_Multi_RFE_example_S32R45 Source code, and found the SPI transceiver function RsdkRfeGlueSpiTransfer. But I didn't find any place in the code to operate on the chip select signal.

Quad SPI is not covered by Radar SDK as it is more generic. I see there is a component for QSPI in the RTD Drivers for R45.

petervlna_0-1682501857008.png

petervlna_1-1682501869951.png

Best regards,

Peter

 

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