I have bought 2 XFRWY-LS1012A-PA boards for my coming new projects. We have been successfully boot from the Linux in SD card according to your documents.
I read the hardware reference design that it equipped a W25M161AWEIT which is a QSPI FLASH (16MBIT NOR + 1GBIT NAND) chip. Now I have 2 questions:
If we don't need the 1GBit NAND inside (due to cost consideration), which NOR only replacement NOR chip can we use without any software changes (Winbond)? In this case, we will store our Linux in SD(eMMC). The NOR flash is only used to boot the system.
If we want to keep the design and store our Linux in W25M161AWEIT, I think we need to build Linux with JFFS2 file system. Correct? If yes, do you have any step-by-step procedure to help me?
Solved! Go to Solution.
1. You could only use 16M NOR flash without software changing.
2. You could deploy boot firmware in QSPI NOR flash, then deploy Linux Kernel and rootfs filesystem in SD card. In LSDK 2004, Image is about 24M, QSPI NOR flash is not large enough to accommodate Kernel Image.
=> tftp 96000000 firmware_ls1012afrwy_uboot_qspiboot.img
=> sf probe 0:0
=> sf erase 0 +$filesize
=> sf write 96000000 0 $filesize
I assume you are using flex-builder LSDK, you could use the following command to deploy Linux Kernel Image partition and rootfs to SD card.
$ flex-installer -b bootpartition_LS_arm64_lts_5.4.tgz -r rootfs_lsdk2004_ubuntu_main_arm64.tgz -d /dev/sdx
Thank you Yiping!
You might misunderstood my 2'nd question. The flash chip W25M161AWEIT was mounted on XFRWY-LS1012A-PA, its inside actually has 16MB NOR FLASH and 1GBit NAND FLASH. My question is how to deploy the Linux kernel and rootfs file system to this 1GBit NAND FLASH area instead of to a SD Card. I think it involves some settings in flex-builder LSDK to build a image with JFFS2 file system then how can I flash this image to the 1Gbit area inside the W25M161AWEIT QSPI flash.
I thought I'd share my findings as we've recently added NAND support for the SPIStack chip via QSPI on the LSDK for one of our customers.
Out of the box, the NAND die's on these parts are not supported by either the LSDK20.04 or LSDK20.12.
There is an application note from NXP which described how you can add support - this suggests there are some patches, however we were unable to locate them.
The SPIStack chip is simply a NAND and NOR die on the same package with an extra SPI command provided that can be used to switch between them. Thus software needs to be modified to select which die it wishes to talk to.
The SPI commands that are used to communicate to the NAND are different to those of the NOR - normally this wouldn't be a problem as the respective software stacks handle this. However the QSPI controller contains a look up table (LUT) and instead of telling it the bytes you want to send down the wire, you instead tell it which entry in its table to send. Thus the LUT table must be updated to support the type of commands that will be sent to the NAND die. The application note gives some pointers here - alternatively you can modify the QSPI driver to not really use the LUT.
The LS1012a can also be booted from NAND, however there are requirements (made of the flash chip) for this described in the application note - in any case I'm not entirely sure how much consideration has been given for ECC in this use-case. (So perhaps it's best to boot from a small NOR die, and then switching to NAND).
In case we use an eMMC on the SDHC2, an SD card slot on SDHC1. Then we need to change the device tree and rebuild kernel accordingly, correct? Can you guide me how to modify it? By the way, we may required the following boot sequence. Do we need to do it by strapping pins?