What is the typical Gate Bias Voltage for MW6S010N LDMOS device ?

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What is the typical Gate Bias Voltage for MW6S010N LDMOS device ?

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Contributor I


As per the data sheet typical VGS is around 3.0 and most of the design (described in the datasheet) are for an Idq = 125mA. I wanted to know what is the exact VGS which causes an Idq of 125mA . is this voltage temperature dependent ?

Thanks and Regards,

Subrahmanya K S

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