Hi,
- We are using the chip (TFF1024HN) for our project in which one Single External Reference needs to be given to 3x TFF1024HN Chips for synchronized operation.
- 3x chips of TFF1024HN are housed in separate LNB enclosures and Single External reference needs to be given to each LNB through its output IF port
- External reference shall use a high quality VCTCXO with amplifier for better phase noise performance and easily feeding to 3x TFF1024 Chips
- The External reference signal (25MHz) shall ride on a single live wire and accompanying ground wire that travels from External reference circuit to each LNB
- In this scenario, Ground of External reference circuit shall be made common with ground of LNB circuit while the line carrying 25MHz signal shall be connected with either X01 or X02 pin of TFF1024 Chip and the other pin shall be grounded or left n.c.
- Please guide, if the above mentioned arrangement shall make the chip functional or the chip necessarily needs differential input from Crystal at X01 and X02 pins as shown in Datasheet and application note AN11516?
- Please guide us in detail for feeding Single External Reference from a VCTCXO to all three LNBs (TFF1024HN Chips) through a single Wire and ground common.
- Furthermore, we are unable to find the "LO PLL calculator” or “PLL Applet” for Loop filter optimization as mentioned in Section 4.2 of application Note AN11516. Please send us the tool for help.
Your Urgent and detailed response shall be highly appreciated please
