SC18IS606 I2C-SPI Bridge: SPI timing does not look correct

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SC18IS606 I2C-SPI Bridge: SPI timing does not look correct

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joesandom
Contributor I

Hello,

I'm using the SC18IS606 I2C-SPI bridge in my application and the device connected is a TPM 2.0 chip (Infineon SLM9670).

I have modified the spi-sc18is602.c driver to support the SC18IS606, very basic changes such as setting the buffer size to 1024, clock to 7.5MHz and number of chip selects to 3 (I can past the patch if requested).

When I scope the output, it looks as though the clock is not in sync with MISO/MOSI and as a result I am not getting the expected result from the slave device.

The SPI mode is set to 0 but looks like it's being completely ignored based on what the logic analyser is showing. MISO and MOSI looks like there's activity before the falling edge of the clock...

Has anyone had any experience integrating this chip in the past?

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JozefKozon
NXP TechSupport
NXP TechSupport

Hello Joe,

I have found an example for the SC18IS606. Please check this link

With Best Regards,

Jozef

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joesandom
Contributor I

Hello Jozef,

Thanks for sharing the link. I am using https://github.com/torvalds/linux/blob/master/drivers/spi/spi-sc18is602.c - I believe this should be working, I don't see any huge differences in the driver you've sent vs the Linux kernel variant.

It might be to do with the complexity of the TPM 2.0 SLM9670 I am using but I'm not sure.

Any additional advice would be appreciated.

Thanks,

Joe

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JozefKozon
NXP TechSupport
NXP TechSupport

Hello Joe,

please share your schematic with voltage levels and part values. If I understand it correctly, you are using the SC18IS606 as an I2C master to SPI slave. Is that correct? If yes, please share a scope of the SDA and SCL waveforms.

With Best Regards,

Jozef

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