SC16IS750: Data loss in RX_FIFO for higher baud rate

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SC16IS750: Data loss in RX_FIFO for higher baud rate

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ezhilarasansoun
Contributor I

we are working with "SPI-to-UART chip SC16IS750", facing issue when baud rate is configured above 38400 that is 56000 or 115200.

when higher baud rate is configured, there is data loss when reading form RX_FIFO

any suggestions?

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david_diaz
NXP Employee
NXP Employee

Hello,

The limitation for oscillator/crystal frequency is mainly Percent error difference between desired and actual UART baud rate.


For example: we select 8MHz crystal. The baud rate divisor = (crystal frequency/prescaler)/(desired baud rate * 16) as mentioned on chapter 7.8 from the datasheet. So, the baud rate divisor = 8.68 (or 2.17 for prescaler=4). Since the baud rate divisor is an integer number, we have to round it to 9 and the real baud rate will be 5555,56 bps. That presents more than 3.5% baud rate error. In that case, data over UART may be wrongly interpreted.

The acceptable percent error difference between desired and actual UART baud rate depends on a number of bits, but I would like to recommend to keep it definitely below 2.5%. This is the general issue of almost all UART transfers and you may found plenty of web pages with baud rate error calculations.


The optimum solution is using oscillator/crystal frequency which may be divided by 16 and desired baud rate without any reminder. For example 1.8432MHz/(16*57600bps) = 2.

The next solution is searching the oscillator/crystal frequency which will be at least close. For example:
Crystal = 12MHz and the baud rate divisor = 13 will result in 57692.3bps baud rate which presents just 0.16% error.

I hope this information helps.

Regards,

David

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