S32R274 Spinlock abnormal

[yadi_zhang]

I use the instruction lwarx & stwcx. implement the Spinlock function on S32R274。

After a lot of test whitch between Z4 core and Z70 core，I found Spinlock fails sometimes。Z4 core and Z7 core enter the protect area at the same time。

Spinlock variable value is share sram data which attribute is uncacheable。

[lukaszadrapa]

Hi,

this was already discussed here:

https://community.nxp.com/thread/437523#comment-856994 

None of MPC57xx devices (S32R274 also belongs here) have the reservation logic implemented between cores. 

I'm afraid the only option is to use semaphores (SEMA42 module).

Regards,

Lukas

[yadi_zhang]

Hi Lukas

       I have seen your link，I thought S32R274 was different，but the result is not support，It‘s too bad.

      Thank you for your support!