PCAL6524 I/O Port Power-on State

[jzhang09]

Hello, I plan to use the PCAL6524 to support GPIO expansion. I plan to use two of the I/O ports as outputs to control the active high switch control enable inputs of a dual channel load switch device (these enables cannot be left floating). Essentially, I would like to be able to shut off a channel of the load switch at some point in my application.

I understand that at power-on, the PCAL6524 I/Os are configured as inputs, but are the ports then pulled-up to Vcc initially via the internal resistors to prevent floating inputs/ensure a define logic state and the user can then configure as input or output from the system master? I ask this in order to determine if I need external resistors or can I rely on the PCAL6524?

Thanks for your time.

[guoweisun]

You can refer to below simply internal diagram of this part:

[jzhang09]

From the datasheet I see that it states "When an I/O is configured as an input, FETs Q1 and Q2 are off, which creates a high-impedance input. The input voltage may be raised above VDD(P) to a maximum of
5.5 V." So, at power-on, inputs would be floating?

[guoweisun]

After POR the ports are consider as high-impedance input.