PCA9505 PCA9506 address bit for effective chip select

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PCA9505 PCA9506 address bit for effective chip select

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davenadler
Senior Contributor I

We're considering using PCA9505/6 for a new product line that needs a lot of IO. The product has 8 IO cards in slots, each slot would have a PCA9505/6, so the question is how to address the PCA9505/6. Each card is identical, so using the address bits as one would normally doesn't work (no switches or jumpers please). Each card does have a card-select input. So, the question:

Can I use our card-select signal as a PCA9505/6 address bit input? That way, only one of the PCA9505/6 will have an address match to an I2C command (all your examples show fixed ADDR inputs). If so, what is the settling time for the address input prior we can send an I2C command?

Thanks!
Best Regards, Dave

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TomasVaverka
NXP TechSupport
NXP TechSupport

Hi Dave,

Here is the answer from our product group:

The state of address pins is not latched upon power-up, it is latched upon every START bit (condition) following the slave address bits for all GPIO devices. So the address of device can be changed during power-up and running time by changing the state of any address pin.

Sorry for my previous misleading information.

Best regards,

Tomas

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1,158 Views
TomasVaverka
NXP TechSupport
NXP TechSupport

Hi Dave,

I am afraid you cannot use it this way because sampling of all address setting pins (A2, A1 and A0) is done at power-up (or HW reset) time only.

Best regards,

Tomas

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davenadler
Senior Contributor I

Hello NXP - Anybody there?

Tomas, you've said address pins are latched and cannot be changed, but the NXP application note above says OK to change address bits. Can we get a definitive answer please? This should be in the part's datasheet and is missing.

NXP, you are making it very hard for customers to use your parts!

Please provide a definitive answer (and it would be great if you also update the part's datasheet).

Thanks in advance, Best Regards, Dave

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TomasVaverka
NXP TechSupport
NXP TechSupport

Hi Dave,

I do apologize for not following up on this sooner, I am currently double checking it with our product group and will definitely get back to you as soon as I have a final answer. It should be later today or tomorrow.

Best regards,

Tomas

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1,160 Views
TomasVaverka
NXP TechSupport
NXP TechSupport

Hi Dave,

Here is the answer from our product group:

The state of address pins is not latched upon power-up, it is latched upon every START bit (condition) following the slave address bits for all GPIO devices. So the address of device can be changed during power-up and running time by changing the state of any address pin.

Sorry for my previous misleading information.

Best regards,

Tomas

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davenadler
Senior Contributor I

Thanks Tomas for correcting your earlier post and clarifying the chip behavior.

It would be great if NXP can update the datasheet to make this point clear; I am hardly the only designer that will have this question given the IO expansion applications targeted by this chip.

Thanks again,
Best Regards, Dave

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1,159 Views
TomasVaverka
NXP TechSupport
NXP TechSupport

Thanks for your suggestion, Dave. Our product group is going to update the data sheets to make this point really clear.

Best regards,

Tomas

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davenadler
Senior Contributor I

Much appreciated, Thanks!

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1,159 Views
davenadler
Senior Contributor I

Tomas, I found this application note:

PCA9500/PCA9501 card maintenance and control using I2C-bus

It says: "The state of the address pins (A0 to A5) is not latched upon power-up, and the address of PCA950x can be changed during uptime by changing the state of any address pin."

Is this feature broken in PCA9505/6?

Thanks!
Best Regards, Dave

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