We do not specify maximum input power for LDMOS devices since it depends on the amplifier design.
What is really important is the maximum gate-to-source voltage VGS = [-6.0,+10] V. Device would fail if this rating is violated. This limit can be reached in switch or class C amplifier modes.
In common linear amplifier modes, maximum VGS rating corresponds to very high input power (~40dBm). In practice, maximum input power is determined by a level that brings amplifier into strong saturation and may cause amplifier output to be overloaded. (If the drain power is switched off then VGS rating plays the rule.)
For example, AFT27S010N @ 2.14GHz in class AB mode, P3dB=42dBm, Gain=18.5dB -> Pin3dB=23.5dB. At this power level, the signal magnitude is 0.83V at DC bias 2.2V. It is far from the absolute maximum ratings for VGS.
Have a great day,
Pavel
TIC
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