Max. Number of coefficients, fir-algorithm on dsp56371

peter321 · ‎03-02-2011

Hello,

when I use this FIR algorithm:

    rep       #COEFF-1
   mac       x0,y0,a   xr0)+,x0   yr4)+,y0
   macr   x0,y0,a

what is the biggest number for COEFF, when I use clock frequency of 178MHz and a sample rate of 32kHz?

Or how many clock cycles are needed for the this mac instruction?

best regards

peter321 · ‎03-03-2011

Thank you for your replies,

at the moment I'm using a filter with 5000 coefficients and it's working. I'm going to check where the border is. I think it's close to the theoretical value.

My coefficients are from a room impulse response. So it would be nice to use as much values as possible. But in this case it's not possible to use more than max. 5562, isn't it?

rocco · ‎03-03-2011

Hi Peter,
peter321 wrote:
. . . But in this case it's not possible to use more than max. 5562, isn't it?

Correct. And probably less, depending on what else the code needs to do. You may be able to get away with 5,500, if you have little else to do. Give the assembler's cycle-counter a try.

Are you using interrupts? If so, keep in mind that a REP instruction loop will block interrupts for the entire 5005 cycles. The DO instruction does not. This has burnt me in the past.

peter321 · ‎03-03-2011

Ok, good to know..

It's working with 5400, with 5500 not.

Yes, I'm using interrupts for data in- and output. And there is nothing else to do..

thanks

clangen · ‎03-02-2011

Hello Peter,

the MAC instruction requires one cycle, the DSP563xx family shows single cycle instrction in contrast to the elder DSP56xxx core that took two cycles per instruction. In theory you can run 178MHz/32kHz = 5562 instrcuctions per cycle.

In practice you lose time due to interrupt latencies and other overheads.

In the late 90s I did an experiment using the DSP56303. It could run 1024 taps/80MHz at a sample frequency of 48kHz. The theoretical value would be 1666 coefficients. I run into problems with some impementations (I comared different filter algorithms) so this seemed to be the limitation then.

You can run a simple experiment (I did the same): If the DSP cannot manage to calculate the entire filter the output signal will how gross distortion. This phenomenon can be used for benchmarking. I'm courious about your result on the DSP56371.

A good idea is to enable a GPIO pin when the filter algorithm starts and to deactivate it again when its finished. You can check the idle time easily using an oscilloscope.

Best regards

Christian

rocco · ‎03-02-2011

Hi Peter,

To add to Christian's already thorough post (by adding probably irrelevant information):

If you can use the rectangular windowing function, you can do any size FIR filter using only a handful of cycles. I'm doing a 8000 tap fir at a 200 kHz sample rate (DSP56721 at 200 mHz) using only 7 cycles per sample.

Of course, it isn't often that you can get away with a rectangular window.