MWCT10x3A SPI

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MWCT10x3A SPI

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751626331
Contributor I

Hi 

I am using  NXP's MWCT10x3A series of microcontrollers, I just have its datasheet, now i am trying to use its

 SPI function, anyone have its SPI demo?

 ths .

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188 Views
reyes
NXP TechSupport
NXP TechSupport

Hi,

It is unfortunate for me to let you know that there is no SPI demo code from NXP for the MWCT10x3A.

Sorry about that.

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188 Views
751626331
Contributor I

Hi Jose,

You know,I just have a datasheet of the MWCT10x3A,I come true the following source codes by myself,but I have no hardware to check it. So now I have to carefully write this SPI function, and could you help me to check these codes ?

#if 1//20190315 just for test SPI function
#define SPI_POLLING_TRIALS      0xFFF0U
//SPI init
unsigned char spi_init(void)
{
    //0.SIM_PCE1 (bit9: QSPI0 peripheral clok enable)
    //SIM_PCE1 &= ~SIM_PCE1_QSPI1;//QSPI1 IPBus Clock Disnable (NXP mcu no this SPI1?)
    SIM_PCE1 |= SIM_PCE1_QSPI0;//QSPI0 IPBus Clock Enable
    //1.SIM_GPSCL SIM_GPSCH (GPIOC peripheral select)
    SIM_GPSCL &= ~SIM_GPSCL_C7;//ss0_b
    SIM_GPSCH &= ~SIM_GPSCH_C8;//miso0
    SIM_GPSCH &= ~SIM_GPSCH_C9;//sclk0
    SIM_GPSCH &= ~SIM_GPSCH_C10;//mosi0
    //2.(0X0780)GPIO config :GPIOC_PUR(1 weak internal pull for output function;0 no pull) GPIOC_DR(no usefull) GPIOC_DDR(0 input; 1 output) GPIOC_PER(0: GPIO function; 1:peripheral function)
    //GPIOC_PUR;//must config?
    //GPIOC_DR;//must config?
    //GPIOC_DDR;//must config?
    GPIOC_PER |= GPIOC_PER_PE_7|GPIOC_PER_PE_8|GPIOC_PER_PE_9|GPIOC_PER_PE_10;//0X0780: BIT7 - C7(SS0)/ BIT8 - C8(MISO0)/ BIT9 - C9(SCLK0)/ BIT10 - C10(MOSI0)
    //3.QSPI0_SPSCR QSPI0_SPDSR QSPI0_SPDRR QSPI0_SPDTR QSPI0_SPFIFO QSPI0_SPWAIT QSPI0_SPCTL2 (clk interrupt master)
    //mode: master
    QSPI0_SPSCR |= QSPI0_SPSCR_SPMSTR;//master mode
    //starts transaction: Rising edge of SCLK
    QSPI0_SPSCR &= ~QSPI0_SPSCR_CPOL;//Rising edge of SCLK starts transaction
    //transmitted: MSBfirst
    QSPI0_SPSCR &= ~QSPI0_SPSCR_DSO;//MSB transmitted first
    //Transmit interrupt: enable
    QSPI0_SPSCR |= QSPI0_SPSCR_SPTIE;//Transmit interrupt enable
    //Receiver interrupt: enable
    QSPI0_SPSCR |= QSPI0_SPSCR_SPRIE;//Receiver Interrupt Enable
    //spi pin : pull
    QSPI0_SPDSR &= ~QSPI0_SPDSR_WOM;//spi pin (0: pull 1:no pull)
    //QSPI0_SPDSR |= 0x4000;//spi transmit DMA enable
    //QSPI0_SPDSR |= 0x2000;//spi receive DMA enable
    QSPI0_SPDSR &= ~QSPI0_SPDSR_SSB_ODM;//spi ss_b (0: pull 1: open drain)
    QSPI0_SPDSR |= QSPI0_SPDSR_SSB_AUTO;//spi ss_b (0: ss_b out by software; 1: ss_b out by hardware)
    //transaction data size = 8 bits
    QSPI0_SPDSR |= QSPI0_SPDSR_DS_0;
    QSPI0_SPDSR |= QSPI0_SPDSR_DS_1;
    QSPI0_SPDSR |= QSPI0_SPDSR_DS_2;//DS0_0|DS0_1|DS0_2 = 7 : 8 bits transaction data size    ???
    //Baud rate = clk/16
    QSPI0_SPSCR |= QSPI0_SPSCR_SPR_0;
    QSPI0_SPSCR |= QSPI0_SPSCR_SPR_1;
    QSPI0_SPSCR &= ~QSPI0_SPSCR_SPR_2;//011 BD = 16;Baud rate = clk/BD SPR3 = 0;
    QSPI0_SPDSR &= ~QSPI0_SPDSR_SPR3;//011 BD = 16;Baud rate = clk/BD SPR3 = 0;
    //QSPI0_SPFIFO;//SPI FIFO; -- dont use SPI FIFO,ok?
    //QSPI0_SPWAIT;//Transmit Wait Delay; -- what function?
    //QSPI0_SPCTL2;//Stop Mode Holdoff Enable; -- what function?(MCU into halt mode,SPI enable?disable?)
    //SPI mode = enable
    QSPI0_SPSCR |= QSPI0_SPSCR_SPE;//enable SPI mode
    return TRUE;
}
//SPI data send
unsigned char spi_send_block(unsigned char *pBlock, unsigned int wLen)
{
    unsigned char send_ret = FALSE;
    uint16 send_Tr = 0;
    for(send_Tr = 0U; send_Tr < SPI_POLLING_TRIALS; send_Tr++)
    {
        if(QSPI0_SPSCR & QSPI0_SPSCR_SPTE)//1: empty
        {
            if(wLen != 0U)
            {
                wLen--; //Decrese number of chars for the transmit
                QSPI0_SPDTR = *pBlock++;//QSPI0_SPDTR;//Data Transmit Register write_only
            }
            else
            {
                send_ret = TRUE;//Finished data sent
            }
        }
    }
    return send_ret;
}
//SPI data receive
unsigned char spi_recv_block(unsigned char *pBlock, unsigned int wLen)
{
    unsigned char recv_ret = FALSE;
    uint16 recv_Tr = 0;
    for(recv_Tr = 0U; recv_Tr < SPI_POLLING_TRIALS; recv_Tr++)
    {
        if(QSPI0_SPSCR & QSPI0_SPSCR_SPRF)//1: receive full
        {
            wLen--;
            if(wLen != 0U)
            {
                *pBlock++ = (unsigned char) QSPI0_SPDRR;//QSPI0_SPDRR;//Data Receive Register read_only
            }
            else
            {
                recv_ret = TRUE;//Finished data receive
                break;
            }
        }
    }
    return recv_ret;
}
#endif
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188 Views
reyes
NXP TechSupport
NXP TechSupport

Hi Song,

 

Unfortunately, we at the NXP online technical support do not check customer codes, but some exceptions can be made depending on the opportunity, so, in order to continue I need to know the following details, please.

  1. Name of Company.
  2. Website of Company.
  3. Company location.
  4. End product(s) and application.
    5. Targeted production date or timeframe.
    6. Projected volume/quantity.


Have a great day,
Jose

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188 Views
751626331
Contributor I

Thank you all the same. 

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