MPC5634M

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MPC5634M

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none_3710978
Contributor I

Hi, I'm looking to migrate to the MPC5634M but looking for answers to some questions about the part. All of my  questions are pertaining to the MPC5634M.

Why does "lis" appear as an assembler instruction in AN4027 but not in the e200z3 Power Architecture Core Reference Manual, Rev. 2 instruction glossary?  

One of my tool vendors told me that there is a book e instruction set and a newer instruction set, and that their assembler only compiles book e--Is AN4027 and any other freescale assembler code examples written as book e, if not, is there a way to derive book e from the examples?

Are there downloadable assembler example code files such as for AN 4027 or other examples which will compile and run using a book e assembler--Are there any similar files for use with a GNU C compiler?

Are there any code examples for each on chip peripheral, and for using interrupts?

Is there a assembler header file which contains control register declarations?

Is there an interrupt vector table listing?

Where can I find an instruction set details document for the e200z3 processor which shows each assembler instruction  on a single page detailing proper usage such as in MPCFPE32B/AD REV 2, chapter 8?

What is the difference between RAPPID_INIT_FOR_MPC563XM  and DL-RAPPID563XMSW?

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jonr
Contributor III

If you use the CodeWarrior C compiler from Freescale, then the header files for all the registers are included.  Startup code is also supplied.   Interrupts are documented in the reference manual.  I recommend buying a TRK-MPC5634M board to get started.

 

I'm curious - is there an application where you don't think that writing in C will work well?

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TomE
Specialist II

> Why does "lis" appear as an assembler instruction in AN4027 but not in the

> e200z3 Power Architecture Core Reference Manual, Rev. 2 instruction glossary? 

 

This is a POWER chip, originally documented by IBM. That means that everything about these chips is usually documented somewhere else, in some other book. Or sometimes not at all.

 

Read the third post to the following thread for the trail of books I followed trying to get a simple question answered.

 

https://community.freescale.com/message/99882#99882

 

The Chip manual usually lists the differences between the core and the "standard implementation" of that core, which in your case is documented in the "e200z3 Power Architecture Core Reference Manual".

 

That manual then contains a mix of details and differences between that core and the "Standard Books", like the "PEM" (Programming Environments Manual).

 

http://en.wikipedia.org/wiki/PowerPC_e200

 

"The e200 core is developed from the MPC5xx family processors, which in turn is derived from the MPC8xx core in the PowerQUICC SoC processors. e200 adheres to the Power ISA v.2.03 as well as the previous Book E specification"

 

http://en.wikipedia.org/wiki/Power_Architecture#Power_ISA_v.2.03

 

"The specification for Power ISA v.2.03[7] is based on the former PowerPC ISA v.2.02[3] in POWER5+ and the Book E[1] extension of the PowerPC specification. The Book I included five new chapters regarding auxiliary processing units like DSPs and the AltiVec extension."

 

---

 

As for "lis", that isn't a real insruction. If you look in the PEM you'll find "Appendix F - Simplified Mnemonics". You'll also find "lis" listed under "addis" as a "Simplified Mnemonic".

 

How many "simplified nmemonics" in Appendix F? Twenty four PAGES of them!

 

The native assembly is so complicated that almost all code is written using these "simplified" shortcuts, but you won't find them looking through the alphabetic list in the PEM. You have to search there and in Appendix F when reading assembly.

 

There is no "load immediate" in the instruction set. "lis" is a shortcut:

 

    lis rD,value (equivalent to addis rD,0,value)

 

That doesn't help you decodewhat the essential "@ha" and "@l" mean in the following:

 

         lis      %r29,HWMMUBASE@ha       ! point r29 to scratch         addi   %r29,%r29,HWMMUBASE@l  ! both halves.

I'm not really sure, but I think this is an essential compiler convention to keep you same (in this case, gcc). Since this CPU lacks a 32-bit load, all constants have to be loaded 16 bits at a time. Since there's no 16 bit load, they have to be added with the CPU convention that using GPR0 in an instruction loads a real zero instead (another complication). Since there's no UNSIGNED add either, trying to load the constant "0x00008000" as an addis of 0 and an addi of 0x8000 results in the lower 16 being sign extended and you end up with 0xffff8000, so the upper half load has to be of "1". That's what "@ha" means - "high adjust if the lower 16 bits are negative and will sign-extend on the next addi".

 

I've got all of those wrong at some time programming these chips - trying to use GPR0, sign extends and so on.

 

> Where can I find an instruction set details document for the e200z3 processor

> which shows each assembler instruction  on a single page detailing proper

> usage such as in MPCFPE32B/AD REV 2, chapter 8?

 

So you have the FPE, good. I don't think the document you want exists. The "philosophy" of the Power series is to spread the documentation across multiple books.

 

You shouldn't have any problems with "Book E" and basic assembly. There are some extensions (like VLE) that your vendor may be saying they don't support.

 

> Are there downloadable assembler example code file

 

Linux sources? Google for "rlwimi" and/or "eieio".

 

Tom

 

 

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