I am currently designing an external I2C communication module with an I2C clock frequency of 100kHz and I am considering using the SI8600 IC for I2C isolation.
However, I am running into a situation where the bus capacitance of the target product used for communication may exceed 400pF.
In addition, I am considering adding an I2C bus repeater or buffer, such as the PCA9617A, to the B-side of the SI8600, which is capable of handling capacitance up to 4000pF at low speeds, thus potentially solving the problem of the product bus capacitance exceeding 400pF. However, I realized that there were certain design constraints and parameters that needed to be considered, such as VIL, VIH, VOL, and so on.
With this in mind, would it be feasible to connect the B side of the SI8600 to the A side of the PCA9617A? If this is feasible, can the PCA9617A be used to output I2C to a product that needs to communicate, and if this is a viable solution, can you provide guidance on the appropriate pull-up resistor values for the A and B sides of the SI8600 and the B side of the PCA9617A?
Hello fps,
I hope all is great with you. Thank you for using the NXP communities.
PCA9617A A side is regular I2C interface which has VIL = +0.3VCCA (max). Therefore, if you connect the SI8600 B side to the PCA9617A A side, I do not see any potential issue.
In the other hand, please keep in mind the VOL offset from the PCA9617A B side. As we know, the PCA9617A B side (SCLB/SDAB pins) has offset voltage at VOL, and it requires VIL below 0.4V to be able to detect Low level at B side.
The following pull-up resistor value should be fine. Anyway, I do recommend to perform you own tests.
I hope this information helps.
Regards,
David
Hello fps,
Thank you for using the NXP communities. It is our pleasure.
I am pleased to know that the information provided was useful for you.
Correct, the PCA9617A device does not feature the hot-plugging.
Have you considered the devices below?
PCA9511A - Hot Swappable I²C-Bus and SMBus Bus Buffer
PCA9615DP - Two-Channel Multipoint Fast-Mode Plus Differential I²C-Bus Buffer with Hot-Swap Logic
I hope this information helps.
Regards,
David