Hello Alfred,
I hope all is great with you.
In my personal opinion, the correct pull-up resistance value is determined by the I2C line bus capacitance and I generally don’t expect issues with it unless I have an “extreme” number of devices on the I2C bus, the traces are long (more than 30cm) or I have fly wires attached to the circuit. In that case, you may use the following formulas to obtain the minimum and maximum pull-up values:
Where tr (rise time of both SDA and SCL signals) and Cb (capacitive load for each bus line) are in Table 10, VOL (LOW-level output voltage) is at the datasheet of each device and IOL is the minimum sink current of 3 Ma for Standard-mode and Fast-mode, or 20 Ma for Fast-mode Plus.
Pull-up resistors of 4.7kΩ is a reasonable value for most of the users. Anyway, this value might change based on your design.
Using the PCAL6524EV-ARD as a reference, a 3.3kΩ and 3.3V are used.
I hope this information helps.
Regards,
David
Hello Alfred,
I hope all is great with you.
In my personal opinion, the correct pull-up resistance value is determined by the I2C line bus capacitance and I generally don’t expect issues with it unless I have an “extreme” number of devices on the I2C bus, the traces are long (more than 30cm) or I have fly wires attached to the circuit. In that case, you may use the following formulas to obtain the minimum and maximum pull-up values:
Where tr (rise time of both SDA and SCL signals) and Cb (capacitive load for each bus line) are in Table 10, VOL (LOW-level output voltage) is at the datasheet of each device and IOL is the minimum sink current of 3 Ma for Standard-mode and Fast-mode, or 20 Ma for Fast-mode Plus.
Pull-up resistors of 4.7kΩ is a reasonable value for most of the users. Anyway, this value might change based on your design.
Using the PCAL6524EV-ARD as a reference, a 3.3kΩ and 3.3V are used.
I hope this information helps.
Regards,
David
