Please, follow the board layout as provided in the BLT81 datasheet. The output strip line length at the collector must be at least 2cm to spread the heat from the transistor.
Then you must take into account volume heat transfer consideration for natural convection cooling:
1.
If a board is cooled by free air convection from the both sides, dissipated power is:
Power = 2* alpha * PCB_area * (T_board-T_air)
Surface to air heat transfer coefficient alpha = 5.6 + 4*V = 6.8 [W/(m2*K)].
V is air velocity. Typical velocity value for natural convection is ~0.3m/s.
area = Power /(2* alpha * (T_board-T_air))
area = 2W / (2* 6.8 * 40'C) = 0.0037 m2 = 37 cm2 //you can try different initial values
So, you need at least 6cm * 6cm area for each power device to take off 2W heat from both sides of the board.
If a board is cooled from one side then twice more area is required.
If you have multiple heat sources, their thermal areas must not overlap.
2.
If a design has dense layout and you can not provide this minimum area for a single device, it is possible to reduce board size by attaching heat sink at the bottom side of the board.
Minimum volume of heat sink for natural convection is 500-800 cm3*K/W.
https://www.electronics-cooling.com/1995/06/how-to-select-a-heat-sink/
For board to air temperature difference 40'C, required thermal resistance is 40'C/2W =20'C/W
Required heat sink volume is 500..800 / 20 = 25..40 cm3. For example, if heat sink fin height is 2.5cm then the sink base area is 10..16cm2. It is about 3..4 times less than in the case [1].
3.
If a board is fan cooled, provide fan air velocity in the case [1]. The resulting area would be 2..3 times less.
PS. You can find example of thermal consideration in this OnSemi appnote:
http://www.onsemi.com/pub/Collateral/AND9596-D.PDF
Have a great day,
Pavel
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