General question about PA load/source impedance, i.e. MW7IC2725N

[feiwang]

Generally, a PA datasheet defines the source and load impedance for max gain or max efficiency. Since the PA pins and soldering pads are relatively big, where is the reference plane in term of the impedances? Is it at the far or near edge of the pin to the chip body? Taking MW7IC2725N as one example, in the schematics in page 5 in the datasheet, is the load impedance seen before Z5, Z6 or Z7? Thank you.

[THIAM]

My question is relatif to the gain and compression point with respect to the part C12 of 6,8 pF on the output matching.

In fact the datasheet announce a 28.5 dB gain and 44 dBm (25W) of P1dB under VDD = 28 Vdc, IDQ1 = 77 mA, IDQ2 = 275 mA, 2500- 2700 MHz Bandwidth. When I simulated the demoboard using the AWR Non linear Model of MW7IC2725N by carefully implementing all the dimensions of stipline and I obtained 23 dB gain with 35,1 dBm of compression point. This simulated results is contradictory with the one announced in the datasheet.

On another way, I removed the 6,8 pF capacitor with part C12 from my simulation, then i had a 29,5 dB gain with 37 dBm of P1dB. Also, my measurements agree with these results under VDD = 28 Vdc, IDQ1 = 77 mA, IDQ2 = 275 mA, 2600 MHz CW.

Can I have more explanation on the contradiction between the datasheet and the simulated results? On which conditions did you obtain the 44 dBm of P1dB?

Thanks for your attention.

[LPP]

In your case, the load impedance is seen before Z5.

Reference planes of our parts are on the edge of plastic package. So you can just add microstrip with dimensions of the lead. Dimensions of the leads are in datasheet.

Have a great day,
Pavel

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------