GD3162 SPIERR

[Akshat_VE02376]

Hi NXP, 
When I'm writing different values in different gate drivers, I'm facing SPIERR. The gate drivers are connected in a daisy chain configuration as is shown in the attached image. I have also attached the code snippet for the function which writes different values in the lower side 3 gate drivers. (Ideally the code design is to support single value to be written in all 6 GD's but due to some HW constraints, I had to implement separate functions for different configurations in lower side GD's. Even though SPIERR is there, I'm able to write the expected values to the registers

[RafaR · Accepted solution]

Hi all

For anyone who wants to see how this case was resolved, please go to: GD3162 Daisy Chain

Have a great day and best of luck.

[Akshat_VE02376]

Putting it short, what I'm doing is....First sending txData to all 6 gate drivers and then for the particular gate drivers for which the configuration requirement is different, for those gate drivers, I'm over writing to the already configured value

[RafaR]

I am starting to work on your case, I will contact you soon.

[Akshat_VE02376]

Yes please do

[RafaR]

Hi Akshat

Sorry for the delay, I needed to do a little more research.

What would be most helpful is to provide a scope or logic analyzer capture of the SPI frame, also including INTB signal, showing when the SPIERR is actually happening. Normally the GD should reject any invalid frame and not allow you to write any data in that case. SPIERR may occur if the number of SCLK pulses within an instance of CSB low is not a multiple of 24 (in your case 3x24 bits). SPIERR may also occur if the CRC data is incorrect.

Please check which exact SPI frame is generating the SPIERR. Also please list down what register you are intending to write, and with which data, as well as the 3 bytes of data (R/W+addr+data+crc) sent to the SPI peripheral.

Have a great day and best of luck.