Full-duplex transfer using NXP Flex SPI

[pibew84514]

Hi, I've got two boards, LS1028 ardb and Hilsher netX 90.

Both of them are connected through SPI using following lines:

- SCK

- CS

- GND

- MOSI

- MISO

I also have a logic analyzer connected to see what's going on on the bus.

The SPI controller I use on the LS side is FlexSPI (spi-nxp-fspi) provides only implementation for SPI_MEM framework operations.

I tried to perform some tests to check how it works:

Here is the code of my driver

https://tutuappx.com/ Vidmate

uint8_t buf[4];

struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(0x80, 1),SPI_MEM_OP_ADDR(3, 0x000004, 1),SPI_MEM_OP_NO_DUMMY,SPI_MEM_OP_DATA_IN(4, buf, 1));

ret = spi_mem_exec_op(spimem, &op);if (ret) {pr_info("Cannot execute op\n");}

This is what I see on the logic analyzer:

As you can see on the MOSI line I have what I expect in the format: opcode | addr

The problem is that, once the Hilsher SPI is clocked it immediately sends 4 bytes on the MISO line where the first one is 0x11 (it is used to distinguish the device type).

And due to that fact - once the transfer is finished, my buf consists of the following bytes:

0x6e 0x65 0x74 0x58

so the first 4 bytes were skipped But I need them especially this first byte (0x11).

Any ideas about what goes wrong?

[yipingwang]

I am discussing with the AE team, will provide more update later.

[yipingwang]

We have following questions:
Is this customer using LSDK or have their own software?
If they are using LSDK then please ask them to run following commands on U-Boot console: 'sf probe' and 'sf read <offset> <address> <count>'
Please share the register dump of XSPI controller
Provide the schematic with wiring diagram of xspi controller and SPI?
What is the platform clock used?
Can you also share the logic analyser screen shot with data skip showing?