Falling time of SCL and SDA to SE051 is earlier than 12ns.

YukioOyama · ‎10-11-2023

Hello,

The SCL falling time is below.

My working voltage is 3.3V. The clock speed is 400kHz, so it is running at Fast-speed (about 380k to be exact). I am checking the I2C specification for SE051 based on UM10204.

The host is your i.MX8QM, but I don't think there is a fall slope adjustment. Since both master and slave are your devices that developed the I2C spec, I assume they can communicate, is that ok? Or, It doesn't seem to meet i.MX8 specs either, is there an additional setting for falling time?

Best Regards,

Yukio Oyama

Kan_Li · ‎10-12-2023

Hi @YukioOyama ,

Yes, they can communicate with each other without any problem, and we have a quick start guide to bring up se05x on i.mx8 platform, please kindly refer to https://www.nxp.com/docs/en/application-note/AN13027.pdf for details.

Have a great day,
Kan

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YukioOyama · ‎10-12-2023

Thanks for your replies. Your answers encourage me.

However, my question is hardware timing and software communication is not my scope.

In the SE051 datasheet, it says to see at UM10204 for I2C specifications.
Would you say that this specification does not apply to the fall time of Fast-mode in the combination of SE051 and i.MX8QM?

Will this be disclosed in future errata or otherwise? In other words, do I have access to any evidence outside of this case?

I am concerned that the fall time constraints will make Fast-mode unusable. Because the security process will only slow down the overall speed in exchange for its security. So, I would prefer a faster transmission speed.

Best Regards,

Yukio Oyama

Kan_Li · ‎10-16-2023

Hi @YukioOyama ,

Was your snapshot captured when i.mx 8qm drove data on SDA？or driven by SE side? Please kindly clarify.

Best Regards,

Kan

YukioOyama · ‎10-16-2023

Hello Kan-san,

The first snapshot is the SCL driven by i.MX8.
When i.MX8 drives SDA, the fall time is almost the same.

Do all the specifications of the UM10204 apply to I2C devices (slaves)? Or do some items not apply?

Best Regards,

Yukio Oyama

Kan_Li · ‎10-17-2023

Hi @YukioOyama ,

Thanks for the clarification! Actually I don’t see any issue here reg. the communication between imx8 and Se05x/A5000 – the SE does not specify a minimum fall time and although the i.MX8 fall time seems to be too quick for the standard I2C spec but the signal looks very fine without over and undershoots.

Have a great day,
Kan

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YukioOyama · ‎10-17-2023

Hello Kan-san,

>Se05x/A5000 – the SE does not specify a minimum fall time

In the SE051 datasheet, the I2C specification follows UM10204. And UM10204 has a fall time. Doesn't this mean that this is SE051's specification?

Or can you say that the fall time written in UM10204 has no effect on the communication between iMX.8 and SE05x?

Best Regards,

Yukio Oyama

Kan_Li · ‎10-18-2023

Hi @YukioOyama ,

What have been specified in the SE051 data sheet are valid, and for rest part not mentioned in the data sheet, you may refer to UM10204.

Hope that makes sense,

Have a great day,
Kan

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YukioOyama · ‎10-19-2023

Hello Kan-san,

Referring to UM10204, the fall time for the combination of iMX8 and SE051 is below the minimum fall time specified in UM10204, in Fast mode.

As per my first question. Does NXP allow this?

Best Regards,

Yukio Oyama