FTM counter Hardware trigger for PWM Sync at FTM0 on MKE18F

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FTM counter Hardware trigger for PWM Sync at FTM0 on MKE18F

518 次查看
JohnEE
Contributor I

Hello

I need to reset the PWM output channel at the Analog Comparator's rising edge so I wrote the next code to set the PWM on FTM0 . 

SyncMode=1 for enhanced PWM Sync

HWRSTCNT =1

TRIG0 is enabled

HWTRIGMODE=1 in order not to clear TRIG0 to enable bit automatically at each sync event.

but the synchronization didn't work at all. the CMP0 is working just fine and it is providing the rising edge to the FTM0 sync Input successfully

 

破坏者

IFTM_PERIPHERAL->MODE = FTM_MODE_WPDIS_MASK | FTM_MODE_FAULTM(2) | FTM_MODE_INIT_MASK |FTM_MODE_FTMEN_MASK;

IFTM_PERIPHERAL->CONF =FTM_CONF_BDMMODE(3);
IFTM_PERIPHERAL->SYNCONF= FTM_SYNCONF_HWTRIGMODE_MASK | FTM_SYNCONF_HWRSTCNT_MASK | FTM_SYNCONF_SYNCMODE_MASK;//

IFTM_PERIPHERAL->SYNC = FTM_SYNC_CNTMIN_MASK |FTM_SYNC_TRIG0_MASK |FTM_SYNC_REINIT_MASK ;//


IFTM_PERIPHERAL->COMBINE = FTM_COMBINE_COMBINE0_MASK | FTM_COMBINE_COMP0_MASK | FTM_COMBINE_DTEN0_MASK |
FTM_COMBINE_SYNCEN0_MASK | FTM_COMBINE_FAULTEN0_MASK | FTM_COMBINE_COMBINE1_MASK |
FTM_COMBINE_COMP1_MASK | FTM_COMBINE_DTEN1_MASK | FTM_COMBINE_SYNCEN1_MASK |
FTM_COMBINE_FAULTEN1_MASK ;

IFTM_PERIPHERAL->CNTIN=(uint32_t)(-500);
IFTM_PERIPHERAL->MOD=(uint32_t)(500);
IFTM_PERIPHERAL->POL=0;

IFTM_PERIPHERAL->DEADTIME = FTM_DEADTIME_DTVAL(38) | FTM_DEADTIME_DTPS(1); // 38 =0.55usec OK on PC929

IFTM_PERIPHERAL->CONTROLS[0].CnV=(uint32_t)(-400); IFTM_PERIPHERAL->CONTROLS[1].CnV=(uint32_t)(400);

IFTM_PERIPHERAL->CONTROLS[2].CnV=(uint32_t)(-200);IFTM_PERIPHERAL->CONTROLS[3].CnV=(uint32_t)(200);

 

IFTM_PERIPHERAL->CONTROLS[0].CnSC = FTM_CnSC_ELSB_MASK;
IFTM_PERIPHERAL->CONTROLS[1].CnSC = FTM_CnSC_ELSB_MASK;
IFTM_PERIPHERAL->CONTROLS[2].CnSC = FTM_CnSC_ELSB_MASK;
IFTM_PERIPHERAL->CONTROLS[3].CnSC = FTM_CnSC_ELSB_MASK;
/* Set LOAD ok register */
/* enable loading updated values */

IFTM_PERIPHERAL->PWMLOAD = FTM_PWMLOAD_LDOK_MASK;

/* Initialization Trigger Enable */
IFTM_PERIPHERAL->EXTTRIG = FTM_EXTTRIG_INITTRIGEN_MASK;

IFTM_PERIPHERAL->FLTCTRL = FTM_FLTCTRL_FAULT3EN_MASK |FTM_FLTCTRL_FFLTR3EN_MASK |FTM_FLTCTRL_FFVAL(5) ;
IFTM_PERIPHERAL->FLTPOL = FTM_FLTPOL_FLT1POL_MASK;
TRGMUX_SetTriggerSource(TRGMUX0, kTRGMUX_Ftm0, kTRGMUX_TriggerInput0, kTRGMUX_SourceCmp0Output);

 

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501 次查看
Sebastian_Del_Rio
NXP Employee
NXP Employee

Hi John, I hope you're doing well!

 

Could you please try performing the modification for the hardware trigger by changing the sync mode using the FTM ftmInfo configuration structure in the simple_pwm SDK example to the corresponding hardware trigger being used?

For example:
ftmInfo.pwmSyncMode = kFTM_HardwareTrigger_0;

 

This will configure the trigger and all of the corresponding configurations for the sync and syscon registers.

 

Doing this in the SDK example project may be useful to show how to implement the same configurations on your baremetal project, the configurations for these registers can be seen in the fsl_ftm.c source file for the FTM driver in the SDK.

 

This SDK project can be found in the following path of the SDK package:

<…\SDK_2.8.0_TWR-KE18F\boards\twrke18f\driver_examples\ftm\simple_pwm>

 

Please let me know if you continue to have issues.

 

Best regards,

Sebastián

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