Can't connect SWD to LPC5512

cancel
Showing results for 
Search instead for 
Did you mean: 

Can't connect SWD to LPC5512

Jump to solution
340 Views
Contributor IV
Spoiler
We're having serious problems connecting to an LPC5512JBD64E part using SWD and a segger JLink

It is seeing things but can't get the part to talk at all I'm thinking we've got some sort of power problem but..  The datasheet for this part has some issues in that it isn't consistent with the pins tools (V8.x) idea of what is supposed to be what so...


I'd like to have NXP check this schematic for power and SWD connection please

randylee_0-1600186931450.png

 

In particular what is labeled here as FB (pin 29) may or may not be correct for the part. This is set up according to the data sheet but the pins tool says this is a ground maybe.

Segger output of commander:

SEGGER J-Link Commander V6.84a (Compiled Sep 7 2020 17:27:40)
DLL version V6.84a, compiled Sep 7 2020 17:26:08

Connecting to J-Link via USB...O.K.
Firmware: J-Link V10 compiled Jul 17 2020 16:23:38
Hardware version: V10.10
S/N: 50117394
License(s): GDB
VTref=3.303V


Type "connect" to establish a target connection, '?' for help
J-Link>connect
Please specify device / core. <Default>: LPC5512
Type '?' for selection dialog
Device>?
Please specify target interface:
J) JTAG (Default)
S) SWD
T) cJTAG
TIF>S
Specify target interface speed [kHz]. <Default>: 4000 kHz
Speed>
Device "LPC5512" selected.


Connecting to target via SWD
ConfigTargetSettings() start
Disabling flash programming optimizations: Compare, SkipBlankDataOnProg
ConfigTargetSettings() end
InitTarget() start
ERROR: Wrong DM-AP IDCODE detected: 0xFFFFFFFF
InitTarget() end
ConfigTargetSettings() start
Disabling flash programming optimizations: Compare, SkipBlankDataOnProg
ConfigTargetSettings() end
InitTarget() start
ERROR: Wrong DM-AP IDCODE detected: 0xFFFFFFFF
InitTarget() end
ConfigTargetSettings() start
Disabling flash programming optimizations: Compare, SkipBlankDataOnProg
ConfigTargetSettings() end
InitTarget() start
ERROR: Wrong DM-AP IDCODE detected: 0xFFFFFFFF
InitTarget() end
ConfigTargetSettings() start
Disabling flash programming optimizations: Compare, SkipBlankDataOnProg
ConfigTargetSettings() end
InitTarget() start
ERROR: Wrong DM-AP IDCODE detected: 0xFFFFFFFF
InitTarget() end
Cannot connect to target.
J-Link>



0 Kudos
1 Solution
211 Views
NXP TechSupport
NXP TechSupport

Hello @randylee,

I did miss that these pins weren't connected. This circuit would need it in your design. and don't connect directly the VDD_PMU to the GND.

Alexis_A_0-1600990817693.png

Best Regards,

Alexis Andalon

 

View solution in original post

0 Kudos
7 Replies
203 Views
Contributor IV

OK, we'll give that a try.  I don't know I can dead bug that so might have to do another layout for it.

Related question: The pins tool (V8) has the FB pin as a ground.  We're using the 64 pin part and that is showing both pins 29 and 30 as grounds. Pin 31 as LX, pin 32 as VBAT_DCDC, and Pin 33 as VBAT_PMU.

0 Kudos
297 Views
NXP TechSupport
NXP TechSupport

Hello @randylee,

I can deduct from the log messages that there isn't any communication between the MCU and the debugger, this could be due to the MCU is not power-on, there's a hardware problem connection between them, or is stuck in an unrecoverable state. Did your problem happen after programming the device one time?

Looking at your schematic I see that the pull up in the SWDIO and the pulldown in the clock are not present. Also, this is only for security, is a must to put a pull-up resistor in the ISP pin (PIO0.5) so the MCU doesn't boot from the ROM bootloader.

Also, I will suggest checking the schematic from the LPC and the following link: Design Considerations.

Best Regards,

Alexis Andalon

0 Kudos
292 Views
Contributor IV

I've never been able to connect to this device on any of the three boards that we've built so I've got something systemic on the layout I think.  I'm suspicious of power myself... there are descrepencies between the pins tool and the datasheet on power pins, especially what is labeled as FB on the datasheet.

We've attempted adding pullups and downs on the SWD lines to no avail prior.

Will check with the schematic and see if there are clues there.

0 Kudos
269 Views
NXP TechSupport
NXP TechSupport

Hello @randylee ,

After a closer comparison, I look that you're using a larger capacitance than the one used in the LPCXpresso board, the capacitance used in this board is 5.5uF (1 - 4.7 uF, 8 - 0.1uF). 

Also, the pins XTAL32K_P and XTAL32M_P need to be connected to ground. Please check the Table 4 in the datasheet to check how to terminated the pins not used.

Best Regards,

Alexis Andalon

 

0 Kudos
255 Views
Contributor IV

We grounded both xtal pins and changed the VCC cap so it's only the 4.7uF and 0.1uF ones.  Still no go.

I'm wondering about the pin marked FB on the datasheet.  On the pins tools that's marked as some sort of ground I think.  What is that supposed to be?  We have it floating.  In fact, we have FB, LX and VDD_PMU floating at present...

0 Kudos
212 Views
NXP TechSupport
NXP TechSupport

Hello @randylee,

I did miss that these pins weren't connected. This circuit would need it in your design. and don't connect directly the VDD_PMU to the GND.

Alexis_A_0-1600990817693.png

Best Regards,

Alexis Andalon

 

View solution in original post

0 Kudos
144 Views
Contributor IV

The datasheet is plenty cryptic about this whole system... Yes, it turns out that the chip must internally use these things as part of maybe a boost converter? Whatever it is, it is critical that it is there.

0 Kudos