We are using CLRC663 in our project and load protocol function is working fine but the problem is in REQA is not responding. we followed all the instruction given in AN12657 document and also tried without Library examples but none of them is working. we observed that the REQA is getting transmitted successfully but after that we are neither receiving Rx interrupt, data, error. Please find below the REQA code. Can somebody help us to fix this issue or let us know if we are missing anything in the code.
uint8_t Load_Protocol_14443()
{
uint8_t errorRegister1;
write_reg(CLRC663_REG_COMMAND, CLRC663_CMD_IDLE);
write_reg(CLRC663_REG_FIFOCONTROL, 0xB0);
write_reg(CLRC663_REG_FIFODATA, 0x00);
write_reg(CLRC663_REG_FIFODATA, 0x00);
write_reg(CLRC663_REG_COMMAND, CLRC663_CMD_LOADPROTOCOL);
errorRegister1 = read_reg(CLRC663_REG_ERROR);
/* Checks if an Error has occurred*/
if (errorRegister1 != 0)
{
write_reg(CLRC663_REG_DRVMOD, 0x86);
return false;
}
return true;
}
uint8_t send_REQA()
{
write_reg(CLRC663_REG_COMMAND, CLRC663_CMD_IDLE);
write_reg(CLRC663_REG_FIFOCONTROL, 0xB0);
write_reg(CLRC663_REG_TXDATANUM, 7 | CLRC663_TXDATANUM_DATAEN);
write_reg(CLRC663_REG_TXCRCPRESET, CLRC663_RECOM_14443A_CRC | CLRC663_CRC_OFF);
write_reg(CLRC663_REG_RXCRCCON, CLRC663_RECOM_14443A_CRC | CLRC663_CRC_OFF);
write_reg(CLRC663_REG_RXBITCTRL, 0);
write_reg(CLRC663_REG_IRQ0, 0x7F);
write_reg(CLRC663_REG_IRQ1, 0x7F);
write_reg(CLRC663_REG_IRQ0EN, CLRC663_IRQ0EN_RX_IRQEN | CLRC663_IRQ0EN_ERR_IRQEN);// for global int
write_reg(CLRC663_REG_IRQ1EN, CLRC663_IRQ1EN_TIMER0_IRQEN); // only trigger on timer for irq1
uint8_t timer_for_timeout = 0;
CLRC663_timer_set_control(timer_for_timeout, CLRC663_TCONTROL_CLK_211KHZ | CLRC663_TCONTROL_START_TX_END);
// Frame waiting time: FWT = (256 x 16/fc) x 2 FWI
// FWI defaults to four... so that would mean wait for a maximum of ~ 5ms
CLRC663_timer_set_reload(timer_for_timeout, 1000); // 1000 ticks of 5 usec is 5 ms.
CLRC663_timer_set_value(timer_for_timeout, 1000);
write_reg(CLRC663_REG_COMMAND, CLRC663_CMD_IDLE);
write_reg(CLRC663_REG_FIFOCONTROL, 1<<4);
write_reg(CLRC663_REG_FIFODATA, 0x26);
write_reg(CLRC663_REG_COMMAND, CLRC663_CMD_TRANSCEIVE);
// write_reg(CLRC663_REG_IRQ1, 0x7F);
uint8_t irq1_value = 0;
while (!(irq1_value & (1 << timer_for_timeout)))
{
irq1_value =read_reg(CLRC663_REG_IRQ1);
if (irq1_value & 0x40)
{ // either ERR_IRQ or RX_IRQ
break; // stop polling irq1 and quit the timeout loop.
}
}
write_reg(CLRC663_REG_COMMAND, CLRC663_CMD_IDLE);
// if no Rx IRQ, or if there's an error somehow, return 0
uint8_t irq0 = read_reg(CLRC663_REG_IRQ0);
// if ((!(irq0 & 0x04)) || (irq0 & 0x02))
// {
// return 0;
// }
uint8_t rx_len = read_reg(CLRC663_REG_FIFOLENGTH);
uint8_t res, Register1,Register2;
__no_operation();
if (rx_len == 2) { // ATQA should answer with 2 bytes.
Register1 = read_reg(CLRC663_REG_FIFODATA);
Register2 = read_reg(CLRC663_REG_FIFODATA);
res = Register1;
res = Register2;
return res;
}
return 0;
}
void CLRC663_timer_set_control(uint8_t timer, uint8_t value)
{
write_reg(CLRC663_REG_T0CONTROL + (5 * timer), value);
}
void CLRC663_timer_set_reload(uint8_t timer, uint16_t value)
{
write_reg(CLRC663_REG_T0RELOADHI + (5 * timer), value >> 8);
write_reg(CLRC663_REG_T0RELOADLO + (5 * timer), value & 0xFF);
}
void CLRC663_timer_set_value(uint8_t timer, uint16_t value)
{
write_reg(CLRC663_REG_T0COUNTERVALHI + (5 * timer), value >> 8);
write_reg(CLRC663_REG_T0COUNTERVALLO + (5 * timer), value & 0xFF);
}
