BGU8103 ENEBLE pin

[masahirokiniwa]

Hi,

Could you tell me about BGU8103 ENABLE pin?

If I apply Hi-Z to the ENABLE pin, is it pulled-down internally?

I would like to know the operating status, when it's applied Hi-Z.

(This situation will occur when I reset the controller IC.)

Best regards,

M.Kiniwa

[LPP]

ENABLE pin is high input impedance signal. It doesn't have internal pull up/down.

Floating pin would cause unpredictable state between ON/OFF conditions.
Have a great day,
Pavel
NXP TIC

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[masahirokiniwa]

Hi LPP‌,

Thank you for your answer.

Could you tell me an additional question about ENABLE pin?

Is it made of CMOS architecture or Bipolar architecture?

I care through-current when it is midpoint potential.

Best regards,

M.Kiniwa

[LPP]

I need some time to find information about input current requirements of this pin.

Please accept our apology for delay.
Have a great day,
Pavel
NXP TIC

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Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!

- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
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[LPP]

I've got a comment from the RF engineering team:

"

We strongly don’t recommend the customer to leave the Enable pin float or HiZ. The status could be not stable. If the HiZ of GPIO is inevitable, they can connect a 100kOhm resistor from ENABLE to GND, which will force the LNA down once it is float.

BTW, during the reset process, please make sure the Venable<Vcc+0.6V, otherwise there is a risk to damage the LNA.

"