Audio Codec for sgtl5000 is not working for Nvidia Jetson AGX Xavier Ubuntu 18.04 BSP

[Venkatraman]

Hi,

We are using SGTL5000 audio codec in oune of our custom carrier board for Nvidia Jetson Xavier AGX SOM (Ubuntu18.04LST ).

We have applied the custom patch changes related to SGTL5000 it was working in previous release of Nvidia BSP, but in the latest version of Nvidia BSP with the same hardware we have issue with Audio line out.

On the very first time immediately after flasdhing the BSP, we can hear audio line out properly. But once we reboot the system or power cycle, audio line out will not work.
I have attached the code patch file and souurce files for your referance. also attaching the register details. Please help.

Let me know if you need any further detail.

diff --git a/public/hardware/nvidia/platform/t19x/galen/kernel-dts/common/tegra194-audio-p2822-0000.dtsi b/public/hardware/nvidia/platform/t19x/galen/kernel-dts/common/tegra194-audio-p2822-0000.dtsi
index 7c52cb473..75716f99d 100644
--- a/public/hardware/nvidia/platform/t19x/galen/kernel-dts/common/tegra194-audio-p2822-0000.dtsi
+++ b/public/hardware/nvidia/platform/t19x/galen/kernel-dts/common/tegra194-audio-p2822-0000.dtsi
@@ -34,6 +34,7 @@
};

i2c@c250000 {
+ /*
rt5658: rt5659.7-001a@1a {
compatible = "realtek,rt5658";
reg = <0x1a>;
@@ -46,6 +47,17 @@

status = "okay";
};
+ */
+ sgtl5000: sgtl5000.7-000a@0a {
+ compatible = "fsl,sgtl5000";
+ reg = <0x0a>;
+ clocks = <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
+ VDDA-supply = <&sgtl5000_reg>;
+ VDDIO-supply = <&sgtl5000_reg>;
+ VDDD-supply = <&sgtl5000_reg>;
+ clock-names = "extern1";
+ status = "okay";
+ };
};

/* Default for all I2S is long fsync width(31) */
@@ -77,15 +89,8 @@
<&bpmp_clks TEGRA194_CLK_PLLA_OUT0>;

nvidia,audio-routing =
- "x Headphone Jack", "x HPO L Playback",
- "x Headphone Jack", "x HPO R Playback",
- "x IN1P", "x Mic Jack",
- "x IN2P", "x Mic Jack",
- "x Int Spk", "x SPO Playback",
- "x DMIC L1", "x Int Mic",
- "x DMIC L2", "x Int Mic",
- "x DMIC R1", "x Int Mic",
- "x DMIC R2", "x Int Mic",
+ "x Headphone", "x LINE_OUT",
+ "x MIC_IN", "x Mic",
"y Headphone", "y OUT",
"y IN", "y Mic",
"z Headphone", "z OUT",
@@ -115,9 +120,14 @@

/* Override with Codec entries */
nvidia,dai-link-1 {
+ /*
link-name = "rt565x-playback";
codec-dai = <&rt5658>;
codec-dai-name = "rt5659-aif1";
+ */
+ link-name = "sgtl5000-playback";
+ codec-dai = <&sgtl5000>;
+ codec-dai-name = "sgtl5000";
};

hdr40_snd_link_i2s: nvidia,dai-link-2 { };
diff --git a/public/hardware/nvidia/platform/t19x/galen/kernel-dts/common/tegra194-fixed-regulator-p2888-0001.dtsi b/public/hardware/nvidia/platform/t19x/galen/kernel-dts/common/tegra194-fixed-regulator-p2888-0001.dtsi
index 092398d2a..afc81e4dd 100644
--- a/public/hardware/nvidia/platform/t19x/galen/kernel-dts/common/tegra194-fixed-regulator-p2888-0001.dtsi
+++ b/public/hardware/nvidia/platform/t19x/galen/kernel-dts/common/tegra194-fixed-regulator-p2888-0001.dtsi
@@ -24,5 +24,14 @@
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
+
+ sgtl5000_reg: regulator@0 {
+ compatible = "regulator-fixed";
+ reg = <0>;
+ regulator-name = "vdd-ac-bat";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
};
};

diff --git a/public/kernel/kernel-4.9/arch/arm64/configs/tegra_defconfig b/public/kernel/kernel-4.9/arch/arm64/configs/tegra_defconfig
index 3d344469e..702b8e3d4 100644
--- a/public/kernel/kernel-4.9/arch/arm64/configs/tegra_defconfig
+++ b/public/kernel/kernel-4.9/arch/arm64/configs/tegra_defconfig
@@ -835,6 +835,7 @@ CONFIG_SND_HDA_POWER_SAVE_DEFAULT=1
CONFIG_SND_HDA_TEGRA=y
CONFIG_SND_USB_AUDIO=y
CONFIG_SND_SOC=y
+CONFIG_SND_SOC_SGTL5000=y
CONFIG_SND_SOC_TAS2552=y
CONFIG_SND_SIMPLE_CARD=y
CONFIG_SND_SOC_TEGRA_T186REF_P4573_ALT=y
diff --git a/public/kernel/kernel-4.9/signing_key.x509 b/public/kernel/kernel-4.9/signing_key.x509

--- a/public/kernel/nvidia/sound/soc/tegra-alt/machine_drivers/tegra_machine_driver_mobile.c
+++ b/public/kernel/nvidia/sound/soc/tegra-alt/machine_drivers/tegra_machine_driver_mobile.c
@@ -400,6 +400,23 @@ static int tegra_machine_dai_init(struct snd_soc_pcm_runtime *runtime,
}
}
}
+
+ rtd = snd_soc_get_pcm_runtime(card, "sgtl5000-playback");
+ if (rtd) {
+ dai_params =
+ (struct snd_soc_pcm_stream *)rtd->dai_link->params;
+
+ dai_params->rate_min = srate;
+ dai_params->channels_min = channels;
+ dai_params->formats = formats;
+
+ err = snd_soc_dai_set_sysclk(rtd->codec_dai, RT5659_SCLK_S_MCLK,
+ aud_mclk, SND_SOC_CLOCK_IN);
+ if (err < 0) {
+ dev_err(card->dev, "codec_dai clock not set\n");
+ return err;
+ }
+ }

return 0;
}
@@ -583,6 +600,24 @@ static int tegra_machine_rt565x_init(struct snd_soc_pcm_runtime *rtd)
return 0;
}

+static int tegra_machine_sgtl5000_init(struct snd_soc_pcm_runtime *rtd)
+{
+ /* well this no longer works, function removed. lets hope this is already configured. */
+ /*
+ struct tegra_machine *machine = snd_soc_card_get_drvdata(rtd->card);
+ int err;
+
+ err = tegra_alt_asoc_utils_set_extern_parent(&machine->audio_clock,
+ "pll_a_out0");
+ if (err < 0) {
+ dev_err(rtd->card->dev, "Failed to set extern clk parent\n");
+ return err;
+ }
+ */
+
+ return 0;
+}
+
static int codec_init(struct tegra_machine *machine)
{
struct snd_soc_dai_link *dai_links = machine->asoc->dai_links;
@@ -602,6 +637,8 @@ static int codec_init(struct tegra_machine *machine)
dai_links[i].init = tegra_machine_fepi_init;
else if (strstr(dai_links[i].name, "respeaker-4-mic-array"))
dai_links[i].init = tegra_machine_respeaker_init;
+ else if (strstr( dai_links[i].name, "sgtl5000-playback" ))
+ dai_links[i].init = tegra_machine_sgtl5000_init;
}

return 0;

root@stevie:/home/nvidia# cat /sys/kernel/debug/regmap/7-000a/registers
000: a011
002: 0060
004: 0004
006: 0130
00a: 0010
00e: 020c
010: 3c3c
014: 015f
020: 0000
022: 1818
024: 0132
026: 0000
028: 0041
02a: 0200
02c: 0304
02e: 0f0f
030: 4860
032: 5000
034: 0800
036: 0017
03a: 0000
03c: 0000
100: 0000
102: 0000
104: 0040
106: 051f
108: 0000
10a: 0040
10c: 0000
10e: 0000
110: 0000
116: 002f
118: 002f
11a: 002f
11c: 002f
11e: 002f
120: 8000
122: 0000
124: 0510
126: 1473
128: 0028
12a: 0050
12c: 0000
12e: 0000
130: 0000
132: 0000
134: 0000
136: 0000
138: 0000
13a: 0000
root@stevie:/home/nvidia#

[JozefKozon]

Dear Venkatraman,

please see below an answer from the application engineer. Please answer his question.

DESCRIPTION

It should be not SGTL silicon issue. Could customer ask Nvidia about the BSP difference between two versions of SGTL5000? Or did customer check the BSP difference of SGTL5000 part?

With Best Regards,

Jozef