A3I20X050GN LDMOS PA FET VGGC parameter clarification

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A3I20X050GN LDMOS PA FET VGGC parameter clarification

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louissankoorika
Contributor I

Hi,

We are using the A3I20X050GN LDMOS PA FET in our design.

I need clarity on the VGGC(Q) parameter

Fixture Gate Quiescent Voltage, (VDD = 28 Vdc, IDQ(Carrier) = 160 mAdc, Measured in Functional Test),
VGGC(Q)

How  is it different from VGSC(Q) parameter which is also specified?

Gate Quiescent Voltage (VDS = 28 Vdc, IDQ(Carrier) = 160 mAdc) VGSC(Q)

Thanks

Louis

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andrei_skok
NXP TechSupport
NXP TechSupport

Gate Quiescent Voltage VGS(Q) is measured at the VGS pins of the device.
Fixture Gate Quiescent Voltage VGG(Q) is measured in test circuit at the VGG supply.

Temperature compensation circuit sinks the current. VGG(Q) differ from VGS(Q) by the voltage drop at the circuit bias resistors R3=10 Ohm, R1=2.2kOhm.

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andrei_skok
NXP TechSupport
NXP TechSupport

Gate Quiescent Voltage VGS(Q) is measured at the VGS pins of the device.
Fixture Gate Quiescent Voltage VGG(Q) is measured in test circuit at the VGG supply.

Temperature compensation circuit sinks the current. VGG(Q) differ from VGS(Q) by the voltage drop at the circuit bias resistors R3=10 Ohm, R1=2.2kOhm.

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