S32K1xx - Low Power Modes Introduction

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S32K1xx - Low Power Modes Introduction

NXP Employee
NXP Employee

One of the most important features of the S32K1xx is the power management controller, that allows the user to minimize the current consumption depending on the running application. The PMC blocks allows user to handle the device power modes and trigger subsystems execution when switching between power modes.

The following table describes the power modes for the S32K14x processor:

RUNThe MCU can be run at full speed and the internal supply is fully regulated, that is, in run regulation. This mode is also referred to as Normal Run mode.
HSRUNThe MCU can be run at a faster frequency compared with RUN mode and the internal supply is fully regulated.

The core clock is gated off. There are two variants of stop mode - STOP1 and STOP2. In STOP1 system clock as well as bus clocks are gated. In STOP2 bus clocks keep running whereas system clocks are gated.

  • NVIC is disabled.
  • AWIC is used to wake up from interrupt.
  • Some peripheral clocks are stopped.

The core, system, bus, and flash clock maximum frequencies are restricted in this mode.

On-chip voltage regulator is in a low power mode that supplies only enough power to run the chip at a reduced frequency.

  • Reduced-frequency flash memory access mode (1 MHz)
  • LVD off
  • SIRC provides a low power 4 MHz source for the core, the bus, and the peripheral clocks.

The core clock is gated off. System clocks to other masters and bus clocks are gated off after all stop acknowledge signals from supporting peripherals are valid.

Places the chip in a static state with Low Voltage Detect (LVD) operation off. This is the lowest-power mode in which pin interrupts are functional.

  • Some peripheral clocks are stopped. See Module operation in available low power modes.
  • The LPTMR and CMP can be used.
  • The NVIC is disabled.
  • The AWIC is used to wake from interrupt.
  • The on-chip voltage regulator is in a low power mode that supplies only the power needed to run the chip at a reduced frequency.
  • All SRAM is operational (content is retained and I/O states are maintained).


The following diagram shows the power mode transitions. Any reset always brings the chip back to the Normal Run state. In run, stop modes active power regulation is enabled. The VLPR modes offer a lower power operating mode than normal modes. VLPR is limited in frequency.



Power mode state transition diagram (S32K1xx Series Reference Manual, Rev. 4, 06/2017 pag.969)

For more information about power modes and please read the AN5425, Power Management for S32K14x.

Another important feature that we provide through the new MDBT release is the possibility of automatically call a subsystem "Before", "After" and "Before and after" switching between the power mode selected in the PMC_Config block. The following example shows a PMC_Config block that changes the running mode to VLPS and calls two callbacks: the first one is called "Before" entering the VLPS mode and the second one is called "After" the ISR Handle is executed. The "Before and after" callback is not required so a terminator was added.


 PMC_Config Blocks Callbacks example


For demonstrating the functionality of the power management controller we created an application presented in the following video, that measures the ambient temperature using an NXP S32K144 controller. The example combines some blocks in Model-Based Design Toolbox as FLEXIO, LPTMR and PMC.


The peripherals blocks used for this examples, can be found in MBDT and provides the following features:

  1. FLEXIO is a highly configurable module providing a wide range of functionality including emulation of a variety of serial communication protocols. The MBDT blocks provides support for the following communication protocols: I2C, UART, SPI.
  2. LPTMR (low-power timer) can be configured to operate as a time counter with optional prescaler, or as a pulse counter with optional glitch filter, across all power modes, including the low-leakage modes. The MBDT blocks provides support to configure LPTMR as Time Counter mode or Pulse Counter mode and an interrupt handler functionality.
  3. PMC (power management controller) provides multiple power options allowing users to optimize power consumption for the level of functionality needed. The MBDT blocks provides support for running the S32K144 trough the following power modes: VLPS, VLPR, HSRUN, RUN, STOP1/2 and also it can run some callbacks to be triggered on changing the power mode.

On this example the controller uses I2C emulation via FLEXIO to read the temperature from an I2C sensor and send the value over UART communication, every 10 seconds. While the microcontroller waits for those 10 seconds to pass, it runs in the STOP1 low power mode. To wake up the processor every 10 seconds, an interrupt is triggered by the low power timer which is clocked by the SIRC clock. Also to measure the real time current consumption we connected an ammeter in series with the microcontroller on the J15 jumper of the S32K144EVB.


For more detailed explanation please watch the following video.


You can also download and test this example which is available as attachment.


Thank you for your attention! if you have questions feel free to reply to this discussion.

Original Attachment has been moved to: mbdt_s32k14x_pmc_temperature_example.mdl.zip

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3 Replies

Contributor IV

Hello Marius, 

Thanks for the summary provided. 

One year later, I was wondering how to use the ARM SYStick together with low power modes. SYStick is always clocked by the core clock, that is stopped in stop2 and VLPS. Furthermore, NVIC is disabled and in AWIC list of peripherals the SYSTICK does not appear. 

What's the best practice here? 

Thanks and K.R.


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NXP Employee
NXP Employee

Hello Catosh‌,

Thank you for your interest in the S32K14x controllers. This community is dedicated to the Model-Based Design Toolbox for Matlab and I think that your question is not related to that. 

But let me understand your question: are you looking for a way of waking up the processor whenever the SYStick interrupt is triggered? Or you want to set a timer to wake up the processor even from the VLPS and STOP2 running mode? In this case, according to the table Table 38-4. Module operation in available low power modes from the S32K-RM  the LPIT/LPTMR/RTC timers are available (only with SIRC as clock source) in Async operation in theVLPS/STOP2, so I would use an interrupt triggered by those peripherals. 

I am waiting for your response,


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Contributor IV

Hi Marius, 

Sorry, i didn't notice I was posting in the wrong section - I saw that your topic was related to Low power modes and that it somehow was helping me in clarifying the topic. 
In ARM architecture the SysTick was thought as a timer for the tick of an operating system or a scheduler, but looks like that SysTick peripheral + OS it's not the best fit for low power designs - at least not on the S32K14x family. Of course, for low power I can choose from the other three clocks but then the SysTick loses its original purpose. 
Hence my question, I was wondering if there are some best practices or design guide from NXP in order to leverage both the low power capabilities of the S32K AND the SysTick from ARM architecture.

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