Battery measurements with Simulink on UM11310 HV BMS

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Battery measurements with Simulink on UM11310 HV BMS

2,169 Views
ranulf
Contributor IV

I am able to download Simulink code to the UM11310 thanks to the help provided with this discussion: https://community.nxp.com/t5/NXP-Model-Based-Design-Tools/Download-code-created-with-MBDT-for-S32K-t...

Now I need to make battery measurements. I am using this article as a guide. https://community.nxp.com/t5/NXP-Model-Based-Design-Tools/BMS-amp-MBDT-MC33771B-MC33772B-TPL-communi... I am not successful so far.

Simulink1.png

 I use CAN to send out the status value from the "MC3377xB Config" block. The status output is 8, which according to the documentation means, "Communication Timeout."

MC3377xB_Config_Config.png

MC3377xB_Config_SPIpng.png

I believe I have the "SPI CS Selections" right based on the MCU schematic in section 3.7.3 of the UM11310 User manual. There are many, many pin options in the "LPSPI Config" blocks. I have played around a little bit in there, but so far I have not been successful.

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ranulf
Contributor IV

@mariuslucianand With the C code insertion approach, would the BMS blocks that are part of MBDT for S32K1xx work? It looks like they won't as they all probably require the "MC3377xB Config" block and they all have MC3377xB in the name and the board uses the MC33771C.

 

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2,135 Views
ranulf
Contributor IV

@mariuslucianandThe schematic shows PTD2 (pin 46) as not connected to anything. This is the pin you have selected for SOUT for the slave above. The other options for SOUT are PTB16 and PTE0. Those are not available either, according to the schematic. Is the schematic wrong or is the block drop-down menu wrong?

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mariuslucianand
NXP Employee
NXP Employee

Hello @ranulf ,

As you can see, both SIN (for Master LPSPI Instance) and SOUT (for Slave LPSPI instance) are not used in the schematic and not connected to anything. However, the MBDT SPI block does not allow you to set the "None" option on the pin, so the pin will be initialized for SPI, but not used when data is transferred. The data that might appear on that pin will be ignored. In the "original" SPI protocol, there is a net to send data from Master to Slave (MOSI) and another one to exchange data from Slave to Master(MISO). But on TPL there a special use-case. Let me explain.

mariuslucianand_1-1604949217487.png

In the above image, you can see how data is being transferred from S32K to an MC33771 via TPL, and reverse. Basically, MCU is going to use an entire SPI instance as MOSI, and another SPI instance as MISO. When S32K will send a frame on the TPL bus, it will send the frame via the MOSI and SCK1. The CS1 falling edge (Slave Select) will cause the "11" sequence on the bus. The frame will arrive at the selected MC33771 device, but also, the "11" sequence on the bus will select the S32K slave LPSI instance so the message will get to the S32K as a loopback message. Now, as you know, an SPI Slave cannot initialize a data transfer. So this is the reason why the second SPI instance is used by the S32K and configured as Slave. When the MC33771 sends a response to the S32K, the MC33771 start of frame "11" which will set the falling edge event on the CS2. This will notify the S32K SPI Slave configured instance that the MC33771 is sending a response. The data will arrive at the S32K on the second SPI instance, configured a MISO 

We can simplify the UM11310 schematic by having a look at the MC33664 Typical application circuit. Basically, there is no MISO_0, because the MC33664 will not send anything back to the MCU when it wants to transfer data on the TPL bus. Same, for the RX: the MCU will not send any response to the MC33664. 

mariuslucianand_0-1604948673252.png

So, both of the blocks drop down pins and the schematics are correct, but the usage of the TPL protocol has created this special use-case.

Hope this helps,

Marius

 

2,124 Views
ranulf
Contributor IV

Thanks for the careful answer. I wonder if you ever sleep.

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mariuslucianand
NXP Employee
NXP Employee

Thanks for caring! These days, we have time for everything.

Marius

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2,165 Views
ranulf
Contributor IV

With LPSPI_Config set to master, SOUT on the Pins tab has three options (see below). However, none of these options appear to be available in the MCU schematic in section 3.7.3 on page 14 of the UM11310 User guide, Rev 1. 

  • PTB16 does not appear in the schematic. The range is PTB0-PTB7, PTB12, PTB13
  • PTD2 is shown as not connected
  • PTE0 is shown as not connected

Am I missing something?

Master LPSPI Config Pins Inconsistent.png

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2,143 Views
mariuslucianand
NXP Employee
NXP Employee

Hello @ranulf,

I had a look at the schematic of the board you are trying to access from MBDT. The board uses an MC33771C as AFE which for now is not supported in our toolbox. The MBDT toolbox can communicate with MC33771BSPI, MC33771BTPL, MPC33772BSI and MC33772BTPL.

However, the C code that can configure and read the measurements from the board you are using can be easily inserted following this article here. https://community.nxp.com/t5/NXP-Model-Based-Design-Tools/How-to-use-your-own-C-code-in-our-Toolbox-... with the lite version of the drivers that can be accessed here https://www.nxp.com/design/analog-expert-software-and-tools/sdk-analog-expert-drivers/embedded-sw-ba... 

I had a look on this driver, and we can provide such support through a patch to the MBDT release 4.2.0. To do such a request, please contact the NXP FAE that you are talking with. After that, we can consider adding such support.

Regarding the LPSPI configuration that you re mentioning here, the Pins tab fields and also the pins option from the LPSPI Config block are updated to be displayed just for the selected instance in the General tab. Let's discuss specifically on the UM11310 case.

The TPL protocol requires two LPSPI instances to be used, one as master ( for sending data through the MC33664 transceiver on the TPL bus) and other as slave (to receive data from the TPL bus through the MC33664 transceiver).

For the TX:

mariuslucianand_1-1604934696976.png

 

The bord uses PTB1, PTB2 and PTB5 as SOUT, SCK and respectively CS are the ones from the LPSPI0. For that, as Master you have to select the Instance 0. This will update the Pins, where you can select the ones mentioned in the schematic

mariuslucianand_2-1604934769939.png

mariuslucianand_3-1604934826341.png

For the RX:

THe board uses the LPSPI1 as PTD0, PTD1, PTD3 as SCK, SIN and PCS0.

mariuslucianand_4-1604934934642.pngmariuslucianand_5-1604934968133.png

mariuslucianand_6-1604935008575.png

Hope this helps,

Marius

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2,083 Views
ranulf
Contributor IV

@mariuslucianandDo you have access to any tables that compare the features of the various MC3377xx chips?

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ranulf
Contributor IV

I found one at https://www.nxp.com/parametricSearch#/category/c757_c40_c328 that compares the MC33771B* chips.

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ranulf
Contributor IV

@mariuslucianandHow long do you think it might take for NXP to provide support for the MC33771C through a patch to the MBDT release 4.2.0?

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2,108 Views
ranulf
Contributor IV

@mariuslucianand 

I got the Lite version drivers for MC33771C from https://www.nxp.com/design/analog-expert-software-and-tools/sdk-analog-expert-drivers/embedded-sw-ba... The files available here are [bcc.c, bcc.h, bcc_communication.c, bcc_communication.h, bcc_mc33771c.h]

When I build I get the error

"fatal error: bcc_mc33771c.h: No such file or directory #include "bcc_mc33771c.h""

That is unexpected because I made bcc_mc33771c.h available as shown below.

coderTarget.png

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2,074 Views
ranulf
Contributor IV

I didn't have the Simulink code accessing the correct bcc folder. Once I had Simulink access the correct bcc folder, that error was no longer present.

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sonik82
Contributor III

@ranulf 

Hello, I am following your path to establish communication with mc33771c chip, but not successful yet. Is it possible to share your buildable model?

 

Thank you in advance

Denis  

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