LPC1549 timer pins, is the UM incorrect?

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LPC1549 timer pins, is the UM incorrect?

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graynomad
Contributor I

After building an Altium part with pin assignments as per section 6.1 (Pin Description) of UM10736 (Rev. 1.2 — 28 December 2017) I then find section 9 (Input Multiplexing) and it seems to have a different idea about which external pins can be selected as inputs to the timers. 

For example

Table 127. SCT0 Input mux registers 0 to 6 — This shows that a 0x0 value selects PIO0_2 as an input.

However in section 6 PIO0_2 is described as

PIO0_2/ADC0_6/SCT1_OUT3

In this section the pin is connected to SCT1, not SCT0 as stated in the Input Mux section. The same applied to about 10 different pins I checked.

Am I going nuts, misreading something, or is the document bad?

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FelipeGarcia
NXP Employee
NXP Employee

Hello Rob,

 

I am deeply sorry for the delayed reply. We have been under a big workload.

 

Regarding your question, I understand the misunderstanding. Table 127 refers to input multiplexing which is different to the regular pin functionality that you are seeing in chapter 6. Please check the below description from UM.

 

The input multiplexer has no dedicated pins. However, several external pins can be selected as inputs to the SCT input multiplexer and all digital pins of ports 0 and 1 can be selected as inputs to the pin interrupts. Multiplexer inputs from external pins work independently of any function assigned to the pin through the switch matrix as long as no analog function is enabled.

If you refer to the table 95, you will see also that SCT0 input mux is connected to PIO0_2 though INPUT MUX.

 

I hope this helps!

 

Best regards,

Felipe

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graynomad
Contributor I

This is why I'm reluctant to start using LPC chips, they seem great and I love the IDE but there's naff-all support.

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