本文探讨了如何解决i.MX8MP EMC测试遇到的问题，主要针对辐射超标问题。除了硬件方案，着重探讨了LVDS展频等软件方案。

This doc explain bootloader secure boot feature and how to re-develop it to support: .FW update .OTP attribute access .IVT protect: 目录 1 参考资料 .................................................................... 2 2 S32G Secure Boot说明 ............................................. 2 2.1 IVT头格式与Secure Boot相关 ................................ 3 2.2 Secure Boot流程 .................................................... 3 2.3 Secure Boot配置 .................................................... 4 2.4 Secure Boot涉及到的HSE内容 ............................... 6 3 环境搭建 .................................................................... 7 3.1 搭建编译环境 .......................................................... 7 3.2 IVT镜像制造 ........................................................... 7 3.3 镜像烧写 ................................................................. 8 3.4 Bootloader Secure Boot测试 .................................. 8 4 Bootloader Secure Boot代码与功能说明 ................... 9 4.1 EB配置说明： ........................................................ 9 4.2 EB生成代码说明： ............................................... 15 5 定制1：HSE FW update .......................................... 22 5.1 代码开发 ............................................................... 22 5.2 测试 ...................................................................... 25 6 定制2：HSE OTP Attribute设置 ............................... 26 6.1 代码开发 ............................................................... 26 6.2 模拟测试 ............................................................... 33 7 定制3：IVT签名 ....................................................... 35 7.1 代码开发 ............................................................... 35 7.2 模拟测试 ............................................................... 40 Contents 1 Reference Materials .................................................. 2 2 S32G Secure Boot ..................................................... 3 2.1 IVT header format for the Secure Boot part .......... 3 2.2 Secure Boot Flow ................................................... 3 2.3 Secure Boot Configuration ..................................... 4 2.4 HSE background of Secure Boot ........................... 6 3 Build the Project ........................................................ 7 3.1 Build the Compiling Environment ........................... 7 3.2 Create IVT Image ................................................... 7 3.3 Burning Image ........................................................ 8 3.4 Bootloader Secure Boot Testing ............................ 9 4 Bootloader Secure Boot Codes and Function Description 9 4.1 EB Configuration .................................................... 9 4.2 EB output codes ................................................... 15 5 Customization 1：HSE FW update ......................... 22 5.1 Codes development ............................................. 23 5.2 Testing ................................................................. 26 6 Customization 2：HSE OTP Attribute Setting ......... 26 6.1 Code Development .............................................. 27 6.2 Simulation test ...................................................... 34 7 Customization 3：IVT Signature ............................. 36 7.1 Codes Development ............................................. 36 7.2 Simulation Testing ................................................ 40  

本文说明S32G LLCE CAN Linux驱动的 快速测试方法。 目录 1 参考资料 .................................................................... 2 1.1 参考资料 ................................................................. 2 1.2 版本匹配说明 .......................................................... 2 2 环境搭建 .................................................................... 3 2.1 使用Yocto编译 ........................................................ 3 2.2 使用Standalone编译 ............................................... 4 3 测试 ........................................................................... 5 3.1 硬件连接 ................................................................. 5 3.2 测试方法 ................................................................. 6 4 LLCE CAN Linux驱动说明 ......................................... 7 4.1 DTS ........................................................................ 7 4.2 源代码 .................................................................... 9  

this doc explain the HSE crypto driver and how to develop new feature 目录 1 参考资料 .................................................................... 2 1.1 参考资料 ................................................................. 2 1.2 版本匹配说明 .......................................................... 3 2 HSE FW服务 ............................................................. 3 2.1 服务描述符 ............................................................. 3 2.2 服务编号 ................................................................. 4 2.3 服务请求和响应 ...................................................... 6 2.4 服务执行 ................................................................. 9 2.5 Crypto驱动AES示例使用到的服务 ........................ 18 3 环境搭建 .................................................................. 19 3.1 安装与编译 ........................................................... 19 3.2 运行Demo ............................................................ 21 4 Crypto驱动代码与功能说明 ...................................... 23 5 定制1：增加GetAttribute功能 .................................. 28 6 CmacCtr Demo简介 ................................................. 31 7 SymmetricPrimitive Demo简介 ................................ 32 8 总结 ......................................................................... 34 9 其它注意事项 ........................................................... 34

Dear All: Customer has encountered eMMC boot failure issue in their i.MX8X platform, finally we confirmed this issue related to external pull-up resistors on DAT0~7 and CMD pins to comply with eMMC SPEC. Please refer to attached "Case Study-i.MX8X boards eMMC boot failure issue.pdf". Thanks.

本文说明在STR Resume后，如何解决M 核与A核的GPIO状态冲突的问题，并简单剖 析了Linux GPIO驱动。 目录 1 背景说明与参考资料 .................................................. 2 1.1 背景说明 ................................................................. 2 1.2 参考资料 ................................................................. 2 2 S32G linux GPIO驱动说明 ......................................... 3 2.1 SIUL2 GPO功能说明 .............................................. 3 2.2 Linux GPIO驱动DTS .............................................. 4 2.3 Linux GPIO驱动初始化 ........................................... 6 3 Rework办法 ............................................................... 7 3.1 SIUL2 GPO驱动PM函数 ........................................ 7 3.2 Rework方法 ............................................................ 9 4 测试办法 .................................................................. 10

Chinese version   S32G的partition off流程要求核稳定的进 入到WFI状态，本文说明如何修改Linux内核， 在A53 Linux关机或kernel panic时，如何让所 有A53 Core进入WFI。 目录 1 背景说明与参考资料 .................................................. 2 1.1 背景说明 ................................................................. 2 1.2 参考资料 ................................................................. 5 1.3 测试工具 ................................................................. 6 2 Panic ......................................................................... 7 2.1 Panic代码流程分析 ................................................. 7 2.2 BSP30修改说明(Non-ATF) ................................... 10 2.3 BSP36修改说明(ATF) .......................................... 15 3 Poweoff ................................................................... 17 3.1 Poweroff代码流程分析 ......................................... 17 3.2 BSP30修改说明(Non-ATF) ................................... 19 3.3 BSP36修改说明(ATF) .......................................... 20 4 Reboot情况说明 ....................................................... 20 5 STR情况说明 ........................................................... 21

由于NXP之前使用的git服务器codeaurora已经永久性关闭，本文说明针对S32G如何迁移到github服务器的方法。 目录 1    服务器迁移情况说明... 2 2    参考文档和工具... 4 3    Yocto迁移说明... 4 3.1  从头开始新建Yocto工程说明... 4 3.2  对已有Yocto工程的迁移说明... 6 3.3  Migrate.sh的帮助... 7 4    独立编译迁移说明... 10 4.1  PFE独立编译... 11 4.2  IPCF独立编译... 13

This doc explain the S32G STR feature details and how to modify it to integrate with M kernel STBY demo, to achieve the fast boot. chinese version: 本文说明S32G A53核STR详细情况及定 制，定制部分说明如何与M7 standby demo结 合，来实现整个产品的快速启动。 请注意本文为培训和辅助文档，本文不是 官方文档的替代，请一切以官方文档为准。 目录 1 参考资料说明 ............................................................. 2 2 Demo创建运行过程 ................................................... 2 3 Linux STR流程 ........................................................... 2 4 ATF Suspend流程 ..................................................... 5 4.1 Suspend流程 .......................................................... 5 4.2 Full boot resume流程 ............................................. 7 5 定制修改 .................................................................... 9 5.1 ATF中实现主核切换为M7 ....................................... 9 5.2 ATF中去掉PMIC与I2C4 ....................................... 11 5.3 ATF中去掉wkpu驱动 ............................................ 17 5.4 Uboot中去掉PMIC与I2C4 ..................................... 18 5.5 Kernel中去掉I2C4 ................................................ 19 6 发布 ......................................................................... 20   This article explains the details and customization of S32G A53 core STR. The customization part explains how to combine with M7 standby demo to realize the quick start of the whole product. Please note that this article is a training and auxiliary document. This article is not a substitute for the official document. Please refer to the official document. Contents 1    Reference materials. 2 2    STR Demo. 2 3    Linux STR call flow.. 2 4    ATF Suspend call flow.. 5 4.1  Suspend flow.. 5 4.2  Full boot resume flow.. 7 5    Customization. 9 5.1  The STR main core is switched to M7 in ATF. 9 5.2  ATF remove PMIC and I2C4. 11 5.3  ATF remove wkpu driver 17 5.4  Uboot remove PMIC and I2C4. 18 5.5  Kernel remove I2C4. 19 6    Release. 20

Memtool is a useful debug tool which can read/write some i.MX register. It is default supported in Linux while not supported in Android. This article describse how to integrate memtool into i.MX8MM Android 12 platform, which is also similar in other i.MX new android platform.  

This doc explain how to build a PFE master project on M7 and how to integration. chinese version. 目录 1 需要的软件与工具 ...................................................... 2 2 Master Demo编译说明 ............................................... 2 2.1 安装RTD_MCAL驱动 ............................................. 2 2.2 安装PFE_MCAL驱动 .............................................. 3 2.3 编译PFE master工程 .............................................. 3 3 修改为支持RDB板的RGMII接口 ................................ 4 3.1 硬件连接 ................................................................. 4 3.2 软件修改 ................................................................. 5 4 Master Demo测试 ...................................................... 7 4.1 硬件连接 ................................................................. 7 4.2 PFE_EMAC1(RGMII)测试过程 ............................... 7 5 Master Demo代码说明 ............................................... 8 6 集成中注意点 ........................................................... 11 6.1 PFE_PreInit .......................................................... 11 6.2 S32G3中的GENCTRL1的配置 ............................. 12 6.3 RX CLOCK重新锁定 ............................................ 13 7 Demo Debug建议 .................................................... 14 7.1 PFE相关寄存器说明 ............................................. 14   Contents 1 Required software and tools ...................................... 2 2 Master Demo compiling ............................................. 2 2.1 Install RTD_MCAL driver........................................ 2 2.2 Install PFE_MCAL driver ........................................ 3 2.3 Compile PFE master project .................................. 3 3 Change the demo to support RDB3 board RGMII port4 3.1 Hardware design .................................................... 4 3.2 Software modification ............................................. 5 4 Master DemoTest ...................................................... 7 4.1 Hardware design .................................................... 7 4.2 PFE_EMAC1(RGMII) test steps ............................. 7 5 Master Demo code flow ............................................. 8 6 Notes in integration .................................................. 11 6.1 PFE_PreInit .......................................................... 11 6.2 The GENCTRL1 configruation of S32G3 ............. 12 6.3 RX CLOCK relock ................................................ 13 7 Demo Debug suggestion ......................................... 14 7.1 PFE related registers ........................................... 14

i.MX RT1170 crossover MCUs are part of the Edge Verse™ platform and are setting speed records at 1 GHz. This ground-breaking family combines superior computing power and multiple media capabilities with ease-of-use and real-time functionality. For reducing the overall system cost, RT117x didn't have embeded flash, need external Flash as program storage and XIP place, NXP and third party like IAR, KEIL and Segger all provide mature tool to make Nor Flash‘s programing with their own flashloader, can fulfillment most customer’s application requirement, but still some users need to customize the flash programing algorithm due to programing speed optimization and difference of the nor Flash from different vendor and, such as SFDP support, QE bit's position, default sector size, DDR/OPI/QPI feature, default 3 Bytes/4 Bytes mode and also operating sequence, but the default Flashloader is based on the ROM API, it's hard to debug and customize as there is no source code. This reference demo will use source code Flash operation API instead of ROM API. In addition, it also add two new useful feature, first one is current Flashloader framework can't support some nor flash which need pre-configuration, such as Cypress's S25HL01GT, its sector size is not unified, need to config additionally. This reference demo give some function interface to implement it with 3 bytes/4bytes command mode and DDR/SDR mode, it also improve the original framework by adding read-erase-write demonstration code, which can help user to verify their customized Flashloader without need to copy to IDE every time, improve the efficiency greatly. Second advantage is it can support download flow‘s log generation, by default there is no log info in overall download flow, hard to locate which step(get configure/init/erase/program/verify) the failure occur, this demo code add log function to record every detailed download step, by which users can optimize their download speed, it's helpful for mass production. Developers can also debug and customize depend on their own specific requirement and different nor Flash.

结合MPC5748G的Lifecycle机制，阐述如何使用Lifecycle机制来满足在开发阶段及最终消费阶段对各利益相关方的数据进行保护的需求，比如Tier1的IP(知识产权)、OEM的一些标定参数、车主的个人隐私等。并介绍Lifecycle在每个阶段所支持的主要安全特性及如何配置使用。

EEPROM selection guide for serial RCON boot. On S32G reference manual, we only ask customer to make sure I2C address of EEPROM is 0xA0, no others requirement. Actually, S32G only supports EEPROM with one 8-bit address byte. For high capacity EEPROM such as AT24C64D@8K bytes, which need two 8-bit word address bytes. Can’t be supported by S32G ROM.   AT24C64D.pdf         AT24C01 has been validated on S32G EVK board, which need one word address byte AT24C01.pdf   Thanks, Lambert

This document introduce how to do LPDDR4 DQ Swapping in S32G platform.

FAST BOOT FOR lx2160 IN adas •Objective To speed ​​​​up bringup of LX2 chip-based systems •Pain Points to Address The bringup time is much longer than 3s, which is very sensitive in ADAS systems or time-sensitive systems. •Value Proposition / Key Features The guide can help customers shorten uboot time from 5s to less than 1.5s, saving more than 70% bootup time. •Deliverables Demo based on LX2160ARDB board. Reference codes and patches. Guide for Fast boot document. Fast boot 广泛用于嵌入式设备，现以lx2160ardb板为例进行相关探索。 启动流程： 优化思路： 1.适当提高FSPI时钟速率 diff --git a/lx2160asi/flexspi_divisor_32.rcw b/lx2160asi/flexspi_divisor_32.rcw index 422139c..0f8d5c9 100644 --- a/lx2160asi/flexspi_divisor_32.rcw +++ b/lx2160asi/flexspi_divisor_32.rcw @@ -7,8 +7,10 @@ * Modify FlexSPICR1 register, to increase FlexSPI clock closer to 50MHz, * with divisor value as 32. * => 750 * 2 / 32 ==> 46.875MHz + *write 0x1e00900,0x00000013 + * 0f -12 =125M */ .pbi -write 0x1e00900,0x00000013 +write 0x1e00900,0x0f .end ​ 2.关键路径优化 固化spd参数 固化ddrc参数 BL33 裁剪 详细patch和测试结果参考附件。

  本文说明S32G  RDB2板Linux板级开发包BSP32 的ATF细节，以帮助客户了解S32G的ATF是如何运行的，以及如何修改到客户的新板上。   从BSP32开始，默认启动需要ATF支持，所以部分定制需要移动到ATF中，Uboot会简单很多。 请注意本文为培训和辅助文档，本文不是官方文档的替代，请一切以官方文档为准。   目录如下： 目录 1    S32G Linux文档说明... 2 2    创建S32G RDB2 Linux板级开发包编译环境... 3 2.1  创建yocto编译环境: 3 2.2  独立编译... 8 3    NXP ATF 原理... 13 3.1  AArch64 Exception Leve: 13 3.2  ATF原理... 14 3.3  ATF目录 结构... 16 3.4  ATF初始化流程... 25 3.5  NXP ATF的SCMI支持... 28 3.6  NXP ATF的PSCI支持... 32 3.7  NXP ATF OPTEE接口（未来增加）... 36 4    ATF 定制... 36 4.1  修改 DDR配置... 36 4.2  修改调试串口与IOMUX定制说明... 39 4.3  启动eMMC定制说明... 48 4.4  I2C与PMIC定制说明... 58

本文说明在S32G2 RDB2板上实现LLCE to PFE Demo的搭建过程。本Demo目前包括：  CANtoEth：CAN0发送，用硬件回环到 CAN1接收，然后通过PFE_EMAC1， 再通过RGMII接口发出。  CANtoEth：CAN0发送，用硬件回环到 CAN1接收，然后通过PFE_EMAC1， 再通过SGMII接口发出。  EthtoCAN：PC通过PFE_EMAC1的 RGMII发出，接收到CAN1，再硬件 回环到CAN0  CANtoCAN Logging to Eth: CAN0发 送，用硬件回环到CAN1接收，然后 通过PFE_EMAC1，再通过SGMII接 口发出,同时LLCE内部硬件把CAN1 再发送到CAN15_TX，再用硬件回环 到CAN14_RX 软件版本为 RTD3.0.0+LLCE1.0.3+PFE0.9.6/0.9.5。

This doc explain how to support a new QSPI nor for boot, SDK and Linux, Contents as follows: 目录 1 硬件设计 .................................................................... 2 2 所需工具和相关资料 .................................................. 5 3 ROM Code的启动流程 ............................................... 5 4 S32G QSPI NOR flash配置表头定制 ......................... 7 4.1 S32G QSPI NOR启动配置表信息 .......................... 7 4.2 目前支持的配置表头分析说明 ............................... 10 4.3 LUT构成与Flash write Data说明 ........................... 16 4.4 具体分析已有的配置表头的LUT与Flash write Data的 配置方法 ...................................................................... 22 4.5 支持一款新的QSPI NOR Flash示例1:Micron........ 28 4.6 支持一款新的QSPI NOR Flash示例2:Winbond .... 31 5 使用IVT打包配置头 .................................................. 33 6 使用IVT工具中的flash image工具烧写镜像到QSPI NOR 中 34 7 软件定制M7 ............................................................. 35 8 软件定制uboot ......................................................... 37 9 软件定制Linux Kernel .............................................. 40 9.1 支持美光8bit DDR 模式(未验证) .......................... 44 9.2 支持1bit SDR fast read 模式 ............................... 46 10 Debug过程中需要注意的几点 .................................. 49 10.1 启动时ROM Code读取QSPI NOR时钟仅有12Mhz左 右 49 10.2 比较大的镜像如果不加参数头，无法从QSPI-NOR上启 动 55   add a new doc for lauterbach driver: S32G How to Develop the QSPI-Nor Lauterbach Script 目录 1    背景和参考资料... 2 1.1  背景说明... 2 1.2  参考资料... 2 2    高速读开发流程... 3 2.1  时钟相关修改... 5 2.2  Lut配置说明... 6 2.3  QSPI NOR控制器配置... 12 2.4  QuadSPI_Write32BytesDOPI读函数分析... 15 2.5  增加AHB read寄存器配置... 17 2.6  测试结果... 18 3    高速写开发流程... 19 3.1  Erase lut分析及调用... 19 3.2  Write lut分析及调用... 21 3.3  测试结果... 22 3.4  Lauterbach烧写镜像脚本说明... 22

This doc expain how to use eMMC from user space, contents as follows: 目录 1 eMMC的分区情况 ...................................................... 2 2 S32G+BSP29上默认的eMMC启动 ............................ 3 2.1 eMMC硬件设计 .................................................. 3 2.2 eMMC的镜像烧写办法与启动 ............................. 6 2.3 增加MMC内核测试工具 .................................... 10 3 eMMC GP功能的测试 .............................................. 10 3.1 eMMC GP功能的说明 ....................................... 10 3.2 eMMC GP功能的测试 ....................................... 11 4 eMMC RPMB功能的测试 ......................................... 13 4.1 eMMC RPMB功能的说明 ................................. 13 4.2 eMMC RPMB功能的测试 ................................. 15