What is the purpose of the RX Pin and the ADC I and Q channels, at that pin, on the PN512?

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What is the purpose of the RX Pin and the ADC I and Q channels, at that pin, on the PN512?

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user_leo
Contributor II

I do not understand the purpose of the ADC I and Q channels on the PN512. PN512 provides a way of reading the value by reading register 0x3b but I don't understand what the values I am getting are supposed to represent.

With the Field turned off I get a value of 0x88.

With the Field turned on I get a value of 0xf0, sometimes 0xff.

If someone could provide an explanation, that would be great.

Thank You

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EduardoZamora
NXP TechSupport
NXP TechSupport

Hi,

ADC_I and ADC_Q, both are just ADC sampling values, indicating the variation of a noise into RX. For a device featuring LPCD functionality, please consider our latest focus products from our NFC Readers portfolio.

Regards,
Eduardo.

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user_leo
Contributor II

Thank you for your reply, 

To follow up, when I am reading register 0x3B what do the values in that register represent? Voltage? Current? 

The PN512 document simply describes it as "the actual value of ADC I/Q channel". What kind of value is it? 

Is there a way to use that value to detect the presence of a tag? 

Thank You

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EduardoZamora
NXP TechSupport
NXP TechSupport

Hi,

ADC_I and ADC_Q, both are just ADC sampling values, indicating the variation of a noise into RX. For a device featuring LPCD functionality, please consider our latest focus products from our NFC Readers portfolio.

Regards,
Eduardo.

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EduardoZamora
NXP TechSupport
NXP TechSupport

Hello @user_leo,

Hope you are doing well.

I and Q are part of the RX section of the device:

EduardoZamora_0-1724877205682.png

These two signals could be taken to judge the overall RX signal quality. You can see an example of ADC I channel behavior in AN11038 Fast Verification of PN512 and amplifier, Section 3.1.1.

Regards,
Eduardo.

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