SPI Timing question (ADS7052 with NHS3152)

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SPI Timing question (ADS7052 with NHS3152)

Contributor II

Hello everybody,

I am currently wondering, if it would generally be possible to connect the TI AD7052 A/D converter to the NHS3152 via SPI. Both datasheets state that an SPI connection is possible in general, though after consulting the respective timing diagrams I am not sure of this. In the ADS7052 datasheet the following is said about the functionality regarding incoming SCLK pulses:

"Figure 37 shows a detailed timing diagram for the serial interface. In the first serial transfer frame after power-up,the device provides the first data as all zeros. In any frame, the clocks provided on the SCLK pin are also used to transfer the output data for the previous conversion. A leading 0 is output on the SDO pin on the CS falling edge.The most significant bit (MSB) of the output data is launched on the SDO pin on the rising edge after the first SCLK falling edge. Subsequent output bits are launched on the subsequent rising edges provided on SCLK. When all 14 output bits are shifted out, the device outputs 0's on the subsequent SCLK rising edges. The device enters the ACQ state after 18 clocks and a minimum time of tACQ must be provided for acquiring the next sample. If the device is provided with less than 18 SCLK falling edges in the present serial transfer frame, the deviceprovides an invalid conversion result in the next serial transfer frame."


Though a lot of options in NHS3152 firmware allow customization of the SPI interface, it seems to me, that generally only 16 SCK pulses are sent for each frame: 


Is SPI communication between these devices generally possible?

Thank You very much in advance!

Best regards


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2 Replies

NXP Employee
NXP Employee



You will need to configure the SSP HW block mode 1 (SSP_CLOCK_CPHA0_CPOL1) or mode 3 (SSP_CLOCK_CPHA1_CPOL1), as you already found in the HW user manual UM10876.

A little below that figure, it states:

After transferring a single word, the SSEL line is returned to its idle HIGH
state one SCK period after the last bit has been captured. For continuous back-to-back
transfers, the SSEL pin is held LOW between successive data words and termination is
the same as for the single word transfer.

So: SSEL pin is held LOW between successive data words, provided all data is provided at once to the API of the SSP driver.


Kind regards,


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NXP TechSupport
NXP TechSupport


Nhs3152 is a normal I2C interface. One can connect to normal I2C interface device through I2C interface.

Have a nice day.


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