PTHRU mode

[dt_t]

Hi Team

I use a microcontroller to read the tag NT3H2111 by pass through mode. A phone will transfer not more than 30 bytes of data to the tag through NFC.

Conditions: PTHRU_ON_OFF= 1b, FD_ON= 11b, FD_OFF=11b, TRANSFER_DIR= 1b( NFC->I2C)

1) When I put a phone to the NT3H2111 tag, the following issue can be observed,

(a) the PTHRU_ON_OFF can be set to 1b, i.e. NC_REG= 0x7D

(b) Then the microcontroller reads the value of NS_REG. The value of the NS_REG is 0x21( RF_LOCKED= 1b, RF_FIELD_PRESENT= 1b) at the beginning

(c) then the microcontroller continue to read the NS_REG value, the value is 0x00( but the phone is still keep touching the tag).

(d) The value 0x00 keep for a few more times of reading of NS_REG.

(e) At last, the value of NS_REG is 0x01b( RF_LOCKED= 0b, SRAM_I2C_READY= 0b, RF_FIELD_PRESENT= 1b)

During the processing from (a) to (e), the phone keeps touching the tag.

Question 1A) Since the phone keep touching the tag, would you tell me why the value of NS_REG is 0x00 in (c) and (d)?

Question 1B) Later on, the value NS_REG read as 0x01( RF_FIELD_PRESENT= 1b). Why doesn't set SRAM_I2C_READY to 1b automatically?

2) Does SRAM_I2C_READY set to 1 if NFC try to write data( not longer than 30 bytes) to NT3H2111?

3) How does microcontroller know the data in SRAM is ready when NFC finish to write the data( not longer than 30 bytes) to the tag? Can we check RF_LOCKED to determine the SRAM data is ready?

Best Regards

dt

[nxf58474]

Hi dt.t,

Hope you are doing well. The situation you describe is strange, because it seems that the RF field is "OFF", so NS_REG reads it as 0, and then if it reads that RF_FIELD_PRESENT = 1. You can see an illustration of the data transfer from NFC to I2C in the Data Sheet.

There are two commands you can use to write from NFC perspective: the WRITE command (4 bytes), and the FAST_WRITE command (the 64 bytes of the SRAM). Please refer to the section 4.1 of the Application Note.

The ways the MCU can know the data is ready to be read are:

• The host polls/reads bit SRAM_I2C_READY from NS_REG to know if data is ready in SRAM
• A trigger on the FD pin indicates to the host that data is ready to be read from SRAM.

Best Regards,

Ricardo