PN7462AU - No SOF, No EOF

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PN7462AU - No SOF, No EOF

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MPereira
Contributor I

When using CLRC663 I can configure an ISO14443B with no SOF nor EOF for RX with:

- Register 35h = 04h (RxCtrl NO EOF / NO EGT Check)

- Register 5Ch = 00h (RxSyncMod SyncVal=burst)

 

How can I achive the same with PN7462AU?

 

Thanks,

Marco Pereira

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fangfang
NXP TechSupport
NXP TechSupport

Hello,

For PN7462 please refer to the Table 206. CLIF_RX_STATUS_REG register of the PN7462 family HW user manual as the link.

URL:https://www.nxp.com/docs/en/user-guide/UM10858.pdf.

Have a nice day.

 

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MPereira
Contributor I

Hello,

Thanks for your answer.

"CLIF_RX_STATUS_REG" register is read-only and reports the status of the RX operation, there is no way to configure the suppression of SOF and EOF of ISO14443B.

Bit 17: (...)a missing or wrong ISO14443B EOF or SOF or a wrong number of received data bytes. Note: When a protocol error is detected, data reception is stopped (...).

PN7462 datasheet says "ISO/IEC 14443 Type A and B" support.

SOF and EOF suppression are options/variants of ISO14443B.

ISO14443B:

7.1.3 Frame format
               PCDs and PICCs shall send characters as frames. The frame is normally delimited by SOF and by EOF. See 7.10.3 for exceptions.

(...)

7.10.3.3 EOF/SOF
                     b3 and b4 indicate the PCD capability to support suppression of the EOF and/or SOF from PICC to PCD, which may reduce communication overhead. The suppression of EOF and/or SOF is optional for the PICC.

 

With CLRC663 it's easy to do but with PN7462 I can't find any reference in the documentation.

 

Best regards,

Marco Pereira

 

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