Hi I have an nfc system based on PN7150. I had some trouble configuring the TXLDO and I think there might be a bug in the documentation on PMU_CFG byte2. I'm referring to UM10936 PMU_CFG definition on p88.
I have my system configured as power config 2 with VDD(PAD)=3.3 and VBAT=VBAT1=VBAT2=5 (both 3.3V and 5V are regulated).
I attempted PMU_CFG = 0x6 0x64 0x1 and measured that TXLDO voltage only goes up to 3.0V
But when I tried PMU_CFG = 0x6 0x64 0x0, TXLDO went to 4.7V
The register definition says PMU_CFG byte2 should =0x1 for CFG2
My three questions:
1. Could you explain what PMU_CFG byte2 does, and if it is accurate that it should be 1 for CFG2, and why did it make TXLDO go to 4.7V when I set byte2=0 ?
2. Could you confirm what the setting for PMU_CFG is supposed to be for the highest possible power with config 2, VBAT=5 ?
3. Are there any scope shots available showing how VDD(TX) is supposed to look like ? I'm seeing 0.6Vpp ripple at 13.5MHz and I'm wondering if that is expected or if my system needs more bulk caps.
(I know PN7150 is nrnd and you recommend PN7160 instead. I am doing sustaining work on an old product.)