Please refer to the following Pseudo Code for details.
CLL
//> Mifare Reader:
//> --------------
// reset chip
SR 01 0F // Softreset
//> IC Configuration:
//> -----------------
SR 14 83 // TxControlReg - InvTx2On=1, Tx2RFEn, Tx1RFEn
SR 15 40 // TxAutoReg - Force100ASK
SR 18 55 // RxThresholdReg - MinLevel, CollLevel
SR 19 4D // DemodReg
SR 23 6F // GsNLoadMod
SR 24 26 // Modwidth
SR 25 8F // TxBitPhase
SR 26 59 // RFCfgReg - RxGain
SR 27 F4 // GsNReg - CWGsN, ModGsN
SR 28 3F // CWGsP
SR 29 11 // ModGsP
//> Start Transceive:
//> -----------------
SR 01 0c // CommandReg - transceive
//> Mifare Request:
//> ---------------
SR 0a 80 // flush FIFO
SR 09 26 // FIFO - Request code
RE 0a 01 // Read FIFOLevel
SR 0d 87 // BitframingReg - StartSend, TxLastBits
SLP 10
//> Response ATQ:
//> -------------
GR 06 // Read ErrReg
RE 0a 02 // Read FIFOLevel
GR 09 // ATQ LSB
GR 09 // ATQ MSB
Hope that helps,
Have a great day!
Kan