How to select sector through RF Interface

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How to select sector through RF Interface

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kfchoong
Contributor IV

Dear Sir / Madam,

I am reading and then writing to NXP NTAG I2C 1K using another NFC device - Device A.  

During reading and writing,  Pass Through is constantly ON and then RF wave is constantly emitted to NXP NTAG I2C 1K.   I have successfully write to SRAM of  NXP NTAG I2C 1K and then read back using device A from NXP NTAG I2C 1K RF interface mapped SRAM address 0xF0.  All 64 bytes are able to be read back.  However, instead of read it back after  NXP NTAG I2C 1K is written (64 bytes) by its host, I write 64 bytes to the Mapped SRAM (0xF0) using device A.  This writing operation has failed.  Device A has return a timeout message to its host, which also meant that timeout while waiting for packet from NXP NTAG I2C 1K.  Failure occurred after send out first packet to NXP NTAG I2C 1K RF interface.  There should have ACK send back but no reply from NXP NTAG I2C 1K RF interface. 

I have follow this procedure of writing to NXP NTAG I2C 1K RF interface, which is the following sequence:

(1) Select sector 0x00 :

     First packet send to  NXP NTAG I2C 1K RF interface : 0xC2, 0xFF, CRC, then wait for ACK from NXP NTAG I2C 1K RF interface.

     Second packet send to NXP NTAG I2C 1K RF interface :  0x00, 0x00, 0x00, 0x00, CRC, then NO REPLY from NXP NTAG I2C 1K RF interface.

(2) Starting to write to 0xF0.

Thanks a million.  Please advice.

Cheers,

KF Choong

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Jorge_Gonzalez
NXP Employee
NXP Employee

Hi KF Choong,

My trip went well, thank you for asking.

Regarding your doubts, please see below:

For read NXP NTAG Register (configuration and session) from RF interface:

Is it the same method as reading the mapped SRAM ?  in which we just need to read from the memory address. 0xF8, 0xF9, 0xE8, and 0xE9.

- Yes, you can use the same READ command as for SRAM. Just notice that session registers are in Sector 3 (addresses 0xF8-0xF9), so you need to use the SECTOR SELECT command first.

For write NXP NTAG Register (configuration and session) from RF interface:

Is it the same method as writing the mapped SRAM ?  in which we just need to write to the memory address. 0xF8, 0xF9, 0xE8, and 0xE9.

- Session registers cannot be written from RF side, only read is allowed.

- For configuration registers you can use the same WRITE command as for SRAM, using addreses 0xE8-0xE9.

Lastly, may I know how can I modify the Register Lock bytes ?  It says that " Once set to 1b, cannot to reset to 0b anymore".  May I know what does this means ?  If I accidentally set to 1b, then how can I reset it back to 0b ?  Or the chip is consider scrapped ?

- As mentioned in the datasheet, setting bits REG_LOCK_I2C or REG_LOCK_RF to 1 is permanent and cannot be reset. This means that write access will be locked from the corresponding interface (I2C and/or RF). You can still write to session registers from the I2C side.

Regards!

Jorge Gonzalez

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Jorge_Gonzalez
NXP Employee
NXP Employee

Hello KF Choong,

With regards to this issue writing to SRAM memory from the RF interface, before writing make sure that the transfer direction is set from RF to I2C interface. For this set the TRANSFER_DIR bit in the NC_REG register to 1 using the I2C interface. Then if pass-through mode is enabled, you should be able to write to SRAM from the RF interface.

Let me know if the issue persists.

Regards!

Jorge Gonzalez

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kfchoong
Contributor IV

Hello Jorge Gonzalez,

Thank you very much.

I am trying to configure the Configuration register (I2C Address 0x3A) but not able to change the TRANSFER_DIR bit value.

It is by default 1b (Fro RF to I2C interface).  The changes is made when RF wave exist and Pass through is configured. 

I also modify the REG_LOCK configuration register, by modify REG_LOCK_I2C bit and REG_LOCK_RF bit to both 0b, which also means REG_LOCK =  0x03.  unfortunately, I am not able to modify these bits.  the REG_LOCK bit is 0x01 after Pass Through is configured.

Please help soon. 

Thank you very much.

Cheers,

KF Choong

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kfchoong
Contributor IV

Hello Jorge Gonzalez,

I have done some testing, and found something:

(1) After configure Pass Through,  the direction is RF to I2C.

(2) After configure Pass Through, I write to SRAM, then check the Configuration NC_REG again.  The Direction switch to I2C to RF.

All the writing and observations are done on the I2C interface, with Pass Through and Rf wave ON.

Please help.

Thank you very much.

Cheers,

KF Choong

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Jorge_Gonzalez
NXP Employee
NXP Employee

Hello KF Choong,

So in your tests above the step (3) would be to set the direction from RF to I2C. Just pay attention that you need to write to SESSION registers (starting at I2C Address 0xFE).

The CONFIGURATION registers are only used to define the default settings of NTAG I2C after POR (Power On Reset).

In your use case I think the REG_LOCK bits should not make any difference.

Regards!

Jorge Gonzalez

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kfchoong
Contributor IV

Hello Jorge Gonzalez,

I have done accordingly, writing to session register, please check the follow:

Step1  :  Apply RF wave. (Success)

Step2  :  Configure Pass Through.  (Success)

Step3  :  Change Transfer Direction to -  I2C to RF. (Success)

Step4  :  I2C Write SRAM. (Success)

Step5  :  Change Direction to - RF to I2C, the memory has locked to RF. (Success)

Step6 :   Awaiting another NFC device (Device A) to write to NXP_NTAG_1K. 

               (Fail :  Device A has fail timeout.  It has waited too long for NXP_NTAG_1K acknowledge response)

The following is the result capture during step 5 :

Expression (Session Register)Value
Nc_Reg'}' (0x7D)
Ns_Reg')' (0x29)
Last_Ndef_Block'\0' (0x00)
Sram_Mirror_Block'ø' (0xF8)
Wdt_Ls'H' (0x48)
Wdt_Ms'\b' (0x08)
I2c_Clock_Str'.' (0x01)

Please help soon.

Thank you very much.

Cheers,

KF Choong

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kfchoong
Contributor IV

Hello Jorge Gonzalez,

Please see step6 comment.  The writing still failing the same.

Please help soon.

Thank you Jorge Gonzalez.

Cheers,

KF Choong

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kfchoong
Contributor IV

Hello Jorge Gonzalez,

I am sending the following to NXP_NTAG, through RF interface :

(1) first packet of the select sector command:  uint8_t buffer1[] = {0xC2,0xFF,0x28}; 

      0x28 is the CRC, which has proven workable, the same is use in Reading from RF interface. 

      Reading Mapped SRAM location from RF interface is successful

But NXP_NTAG has no ACK send back ad then cause timeout error in device A.

Please help soon.

Thank you very much.

Cheers,

KF Choong

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Jorge_Gonzalez
NXP Employee
NXP Employee

Hi KF Choong,

Are you using a 1K or 2K NTAG I2C?

For the 1K case, SRAM in Pass-through mode is mapped to address 0xF0 in Sector 0, which is selected by default, so no need to use the SECTOR SELECT command.

In either case, pay attention that CRC is a 2 bytes value, not only 1 byte, and that CRC value is not fixed, it must be calculated for every command frame. For sector select the first CRC should be 0x29 0x00. For the second part of the command please notice that the NTAG I2C will not reply (passive ACK):

pastedImage_2.png

Hope this helps to resolve the issue.

Regards!

Jorge Gonzalez

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kfchoong
Contributor IV

Hi Jorge Gonzalez,

Once again, many thanks to you.

Without sector select command, the write function works well.

I am able to read the data written by peer NFC device.

Thank you very much.

Cheers,

KF Choong

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Jorge_Gonzalez
NXP Employee
NXP Employee

Hi KF Choong,

Sorry for the delay, I was on a business trip.

Last thing you asked was about wait times (read vs write), which could indeed be an issue if the reader side is not waiting enough time for the ACK (maximum 10 ms for WRITE command).

From your last post I understand that both READ and WRITE are working correctly now?

Please do not hesitate to ask if you still have issues or questions about this subject.

Regards!

Jorge Gonzalez

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kfchoong
Contributor IV

Hi Jorge Gonzalez,

 

Many thanks for your help.  How is your trip ?  Is it a foreign country business trip ?

For the wait time, I do not change anything.  I finally realise that the failure of Peer NFC device write through RF interface is caused by the unstable RF field itself provided.  This unstable has cause the Pass Through in NXP to OFF.  I have fixed this, and without sector select command It works.  Thank you for your help.

However, I have another problem here.  While NXP NTAG 1K is communicating with peer NFC device,  this peer NFC device need to be able to read and write (Through RF Interface)  NXP NTAG 1K Configuration and session register.  I only find brief description (datasheet NT3H1101/NT3H1201.pdf) about read & write to NXP NTAG 1K config and session register through RF interface.  I need your guidance on this.  Would you please help me on these ?  

 

For read NXP NTAG Register (configuration and session) from RF interface:

Is it the same method as reading the mapped SRAM ?  in which we just need to read from the memory address. 0xF8, 0xF9, 0xE8, and 0xE9.

 

For write NXP NTAG Register (configuration and session) from RF interface:

Is it the same method as writing the mapped SRAM ?  in which we just need to write to the memory address. 0xF8, 0xF9, 0xE8, and 0xE9.

 

 

Or, is it we need to follow the method I2C interface read and write to its Configuration and Session Register ? If follow this way, may I know how to fill in the SA address ?

 

Lastly, may I know how can I modify the Register Lock bytes ?  It says that " Once set to 1b, cannot to reset to 0b anymore".  May I know what does this means ?  If I accidentally set to 1b, then how can I reset it back to 0b ?  Or the chip is consider scrapped ?

 

 

Thank you for your advice.

 

Please advice soon.

 

Cheers,

KF Choong

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kfchoong
Contributor IV

Hi Jorge Gonzalez,

I am able to read configuration register through RF Interface (using the normal read method when reading memory), but fail to read session register.

The reason is I am not able to select sector (sector 3) before read (sector 3) 0xF8 and 0xF9 (session register).

  

Please advice soon.

Thank you.

Cheers,

KF Choong

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kfchoong
Contributor IV

Hi Jorge Gonzalez,

The error I get from Peer NFC device when using select sector command is a timeout error, which has the meaning of No Tag or Frame Timeout.

Read and write from sector 0 are successful, which has skip Sector Select command. 

Please advice soon.

Thank you.

Cheers,

KF Choong 

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Jorge_Gonzalez
NXP Employee
NXP Employee

Hi KF Choong,

My trip went well, thank you for asking.

Regarding your doubts, please see below:

For read NXP NTAG Register (configuration and session) from RF interface:

Is it the same method as reading the mapped SRAM ?  in which we just need to read from the memory address. 0xF8, 0xF9, 0xE8, and 0xE9.

- Yes, you can use the same READ command as for SRAM. Just notice that session registers are in Sector 3 (addresses 0xF8-0xF9), so you need to use the SECTOR SELECT command first.

For write NXP NTAG Register (configuration and session) from RF interface:

Is it the same method as writing the mapped SRAM ?  in which we just need to write to the memory address. 0xF8, 0xF9, 0xE8, and 0xE9.

- Session registers cannot be written from RF side, only read is allowed.

- For configuration registers you can use the same WRITE command as for SRAM, using addreses 0xE8-0xE9.

Lastly, may I know how can I modify the Register Lock bytes ?  It says that " Once set to 1b, cannot to reset to 0b anymore".  May I know what does this means ?  If I accidentally set to 1b, then how can I reset it back to 0b ?  Or the chip is consider scrapped ?

- As mentioned in the datasheet, setting bits REG_LOCK_I2C or REG_LOCK_RF to 1 is permanent and cannot be reset. This means that write access will be locked from the corresponding interface (I2C and/or RF). You can still write to session registers from the I2C side.

Regards!

Jorge Gonzalez

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kfchoong
Contributor IV

Hi Jorge Gonzalez,

Millions of thanks to your reply.

I am using 1K and I have skip the select sector function and straight away write to page 0xF0.  NXP_NTAG 1K still timeout.

Then, I recheck again the datasheet.  For write action, the timeout is 10ms , but for read action the timeout is 5ms.  So far, I have not touch on timeout. The read is successful but write fails.  I guess this may be the root cause. 

However, I need your opinion, will this timeout matters or other thing else that might be the root cause ?

Will the time taken for successful write is almost the same as successful read ?  If yes,  this might not be the root cause.

For now, I have not touch on timeout yet.

 

Thank you Jorge Gonzalez.

Cheers,

KF Choong  

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kfchoong
Contributor IV

To skip sector select command has meant that I have skip to send out packet 1 and packet 2 to NXP_NTAG_1K.  I just write to 0xF0 straight away.

Thanks Jorge.

Cheers,

KF Choong

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kfchoong
Contributor IV

Hello Jorge Gonzalez,

I have also try another method, which is I2C read SRAM first follow by RF interface write to mapped SRAM.

The result is still the same, which is device A receive timeout from RF interface when send out sector select command.

I have also capture the status of session register in NXP_NTAG when device A attempt to write to NXP_NTAG.

The write attempt has failed.

The following is the register status:

Expression (Session Register)Value
Nc_Reg'}' (0x7D)
Ns_Reg'!' (0x21)
Last_Ndef_Block'\0' (0x00)
Sram_Mirror_Block'ø' (0xF8)
Wdt_Ls'H' (0x48)
Wdt_Ms'\b' (0x08)
I2c_Clock_Str'.' (0x01)

  

Please help soon.

Thank you.

Cheers,

KF Choong

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