Demoapp from libnfc-nci does not detect NFC tags with PN7160

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Demoapp from libnfc-nci does not detect NFC tags with PN7160

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lukas-janik
Contributor III

Hello,

I'm adding NFC functionality to our product. I'm using NFC2 CLick dev board which has PN7160 on it. [https://www.mikroe.com/nfc-2-click](https://www.mikroe.com/nfc-2-click) .

It is connected using I2C to our ARM SoC. I have built the libnfc-nci repo, branch **NCI2.0_PN7160** with modified GPIO number and I2C dev path macros so that it matches our setup.

I have also enabled debug prints and set correct NXP_TRANSPORT in the libnfc-nxp.conf.

Now, when running the nfcDemoApp poll, it seems that it communicates and basically everything goes OK - on the first run the FW even got updated. The thing is, that no tag is detected. I have tried with attached Type A tag (which my cell phone recognizes).
Excluding changes mentioned above, configuration files are in default state.

What could be the reason? Do I need to tweak RF parameters in the configuration or should it work out of the box?


Thank you in advance,
Lukas

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lukas-janik
Contributor III

@Tomas_Parizek found a problem with my NXP_EXT_TVDD_CFG_2 configuration in libnfc-nxp.conf.

The value of 9th configuration byte (the byte before the last byte in the configuration array) needs to be set to `0x10` when operating at 3.3V. Both factory test app and nfcDemoApp now works as expected.

NXP_EXT_TVDD_CFG_2={20, 02, 0F, 01, A0, 0E, 0B, 11, 01, C2, B2, 00, B2, 1E, 1F, 00, 10, 0C}

 

Thank you!

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lukas-janik
Contributor III

@Tomas_Parizek found a problem with my NXP_EXT_TVDD_CFG_2 configuration in libnfc-nxp.conf.

The value of 9th configuration byte (the byte before the last byte in the configuration array) needs to be set to `0x10` when operating at 3.3V. Both factory test app and nfcDemoApp now works as expected.

NXP_EXT_TVDD_CFG_2={20, 02, 0F, 01, A0, 0E, 0B, 11, 01, C2, B2, 00, B2, 1E, 1F, 00, 10, 0C}

 

Thank you!

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Tomas_Parizek
NXP Employee
NXP Employee

Hello @lukas-janik , 

I see you are using a 3.3V supply as the transmitter power source, right? Could you please check the following settings? 

Tomas_Parizek_0-1754481225410.png

The RF activation could be "blocked" due to the TXLDO check feature (TXLDO is expecting a 5V supply, but you use 3.3V). 

Please let us know whether this helps. 

Zdraví 

Tomáš 

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lukas-janik
Contributor III

Hello Tomas,

thanks a lot. Yes, We're using 3.3V supply; the NXP_EXT_TVDD_CFG was set to 0x02.

Will let you know as soon as I'm near the HW.

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Tomas_Parizek
NXP Employee
NXP Employee

Hello @lukas-janik , 

Ok understood! 

Please check byte number in the NXP_EXT_TVDD_CFG config. 

For a 3.3V supply, this bit shall be set to 0x10

Tomas_Parizek_0-1754550907279.png

BR

Tomas 

 

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lukas-janik
Contributor III

Unfortunately, changing the 9th byte did not make a change. I have checked the nfcDemoApp output to see that the value really changed to 0x10 but it still does not recognize the tag.

I have also tried to replace the OM27160A1 board with another one to check for HW issue but it behaves the same.

I tried to compare communication pattern of the demo app running on the LPC824 vs nfcDemoApp running on the RPi and noticed that there is broader set of technologies enabled on the nfcDemoApp.  But when I change any of POLLING_TECH_MASK, HOST_LISTEN_TECH_MASK or P2P_LISTEN_TECH_MASK in the libnfc-nci.conf, the communication dump is the same so I suppose that the file is not used.

Following is the communication dump after changing EXT_TVDD_CONFIG:

#########################################################################################
##                                       NFC demo                                      ##
#########################################################################################
##                                 Poll mode activated                                 ##
#########################################################################################
                              ... press enter to quit ...

2018:03:09-12:50:02.611	 len =   4 > 20000100
2018:03:09-12:50:02.614	 len =   4 > 40000100
2018:03:09-12:50:02.615	 len =  12 > 600009020020040471125009
2018:03:09-12:50:02.615	 len =   5 > 2001020000
2018:03:09-12:50:02.616	 len =  33 > 40011E001A7E060301D002FFFF01FF000800000100020003008000820083008400
2018:03:09-12:50:02.616	 len =   6 > 20030301A005
2018:03:09-12:50:02.617	 len =   9 > 4003060001A0050100
2018:03:09-12:50:02.618	 len =   5 > 2003020100
2018:03:09-12:50:02.618	 len =   9 > 40030600010002F401
2018:03:09-12:50:02.618	 len =   4 > 20000100
2018:03:09-12:50:02.621	 len =   4 > 40000100
2018:03:09-12:50:02.622	 len =  12 > 600009020020040471125009
2018:03:09-12:50:02.622	 len =   5 > 2001020000
2018:03:09-12:50:02.623	 len =  33 > 40011E001A7E060301D002FFFF01FF000800000100020003008000820083008400
2018:03:09-12:50:02.624	 len =   3 > 2F0200
2018:03:09-12:50:02.624	 len =   8 > 4F0205000001E324
2018:03:09-12:50:02.625	 len =   8 > 20020501A0070103
2018:03:09-12:50:02.625	 len =   5 > 4002020000
2018:03:09-12:50:02.626	 len =   6 > 20030301A00F
2018:03:09-12:50:02.627	 len =  40 > 4003250001A00F200503095001000100000000000000000000000000000000000000000000000000
2018:03:09-12:50:02.628	 len =  10 > 20030703A002A003A004
2018:03:09-12:50:02.629	 len =  17 > 40030E0003A0020101A0030108A0040101
2018:03:09-12:50:02.629	 len =   8 > 20020501A0030108
2018:03:09-12:50:02.630	 len =   5 > 4002020000
2018:03:09-12:50:02.630	 len =   8 > 20020501A0440100
2018:03:09-12:50:02.631	 len =   5 > 4002020000
2018:03:09-12:50:02.631	 len =  18 > 20020F01A00E0B1110C2B200B21E1F00D00C
2018:03:09-12:50:02.632	 len =   5 > 4002020000
2018:03:09-12:50:02.632	 len =  12 > 20020902A05E0101A0400100
2018:03:09-12:50:02.633	 len =   5 > 4002020000
2018:03:09-12:50:02.633	 len =   6 > 20030301A085
2018:03:09-12:50:02.634	 len =  12 > 4003090001A085045008082C
2018:03:09-12:50:02.634	 len =   8 > 20020501A0950101
2018:03:09-12:50:02.638	 len =   5 > 4002020000
2018:03:09-12:50:02.639	 len =  39 > 20022401A00F200503095001000100000000000000000000000000000000000000000000000000
2018:03:09-12:50:02.640	 len =   5 > 4002020000
2018:03:09-12:50:02.641	 len =  52 > 2002310F8501012801002101003001083101033201603801013304010203045401065001025B010080010181010182010E180101
2018:03:09-12:50:02.643	 len =   5 > 4002020000
2018:03:09-12:50:02.644	 len =  13 > 21000A03040302050303800180
2018:03:09-12:50:02.651	 len =   4 > 41000100
2018:03:09-12:50:02.651	 len =   3 > 220000
2018:03:09-12:50:02.651	 len =   5 > 4200020001
2018:03:09-12:50:02.652	 len =  17 > 62000E10010100010406880000003B0101
2018:03:09-12:50:02.652	 len =   5 > 2201021001
2018:03:09-12:50:02.653	 len =   4 > 42010100
2018:03:09-12:50:02.653	 len =   4 > 62010100
2018:03:09-12:50:02.653	 len =  14 > 610A0B0200031080040003108104
2018:03:09-12:50:02.654	 len =   5 > 2003020152
2018:03:09-12:50:02.654	 len =   8 > 4003050001520104
2018:03:09-12:50:02.655	 len =   7 > 20020401850101
2018:03:09-12:50:02.655	 len =   5 > 4002020000
2018:03:09-12:50:02.656	 len =  31 > 21011C000402091039D2760000850101010300010301030011040103000105
2018:03:09-12:50:02.657	 len =   4 > 41010100
2018:03:09-12:50:02.658	 len =  26 > 20021701291446666D010112020207FF03020003040164070103
2018:03:09-12:50:02.658	 len =   5 > 4002020000
2018:03:09-12:50:02.659	 len =  19 > 20021005300104310100320120380101500100
2018:03:09-12:50:02.671	 len =   5 > 4002020000
2018:03:09-12:50:02.672	 len =   8 > 200205010002F401
2018:03:09-12:50:02.672	 len =   5 > 4002020000
2018:03:09-12:50:02.673	 len =  22 > 21031309000101010201030180018101060174017001
2018:03:09-12:50:02.673	 len =   4 > 41030105
2018:03:09-12:50:02.674	 len =   4 > 21060100
2018:03:09-12:50:02.674	 len =   4 > 41060106

 

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Tomas_Parizek
NXP Employee
NXP Employee

Hello @lukas-janik , 

Thanks for providing the logs. 

I have discussed them with our SW expert, and we can see that your device is sending RF_DISCOVER_CMD

-> 2018:03:09-12:50:02.673   len =  22 > 21031309000101010201030180018101060174017001

[NCI][COMMAND][21 03 13 09 00 01 01 01 02 01 03 01 80 01 81 01 06 01 74 01 70 01]
   RF_DISCOVER_CMD
      * Number of Configurations = 9 [0x09]
         --> Configuration N° 1
            - RF Technology and Mode = {Std} NFC_A_PASSIVE_POLL_MODE [0x00]
            - Discovery Frequency    = RF Technology and Mode will be executed in every discovery period [0x01]

         --> Configuration N° 2
            - RF Technology and Mode = {Std} NFC_B_PASSIVE_POLL_MODE [0x01]
            - Discovery Frequency    = RF Technology and Mode will be executed in every discovery period [0x01]

         --> Configuration N° 3
            - RF Technology and Mode = {Std} NFC_F_PASSIVE_POLL_MODE [0x02]
            - Discovery Frequency    = RF Technology and Mode will be executed in every discovery period [0x01]

         --> Configuration N° 4
            - RF Technology and Mode = {Std} NFC_A_ACTIVE_POLL_MODE (RFU) [0x03]
            - Discovery Frequency    = RF Technology and Mode will be executed in every discovery period [0x01]

         --> Configuration N° 5
            - RF Technology and Mode = {Std} NFC_A_PASSIVE_LISTEN_MODE [0x80]
            - Discovery Frequency    = RF Technology and Mode will be executed in every discovery period [0x01]

         --> Configuration N° 6
            - RF Technology and Mode = {Std} NFC_B_PASSIVE_LISTEN_MODE [0x81]
            - Discovery Frequency    = RF Technology and Mode will be executed in every discovery period [0x01]

         --> Configuration N° 7
            - RF Technology and Mode = {Std} NFC_15693_PASSIVE_POLL_MODE (RFU) [0x06]
            - Discovery Frequency    = RF Technology and Mode will be executed in every discovery period [0x01]

         --> Configuration N° 8
            - RF Technology and Mode = Reserved for Proprietary Technologies in Poll Mode [0x74]
            - Discovery Frequency    = RF Technology and Mode will be executed in every discovery period [0x01]

         --> Configuration N° 9
            - RF Technology and Mode = Reserved for Proprietary Technologies in Poll Mode [0x70]
            - Discovery Frequency    = RF Technology and Mode will be executed in every discovery period [0x01]

 

But in reply, we can see the following: 

2018:03:09-12:50:02.673 len = 4 > 41030105

That is a status syntax error.

[NCI][RESPONSE][41 03 01 05]
   RF_DISCOVER_RSP
      * Status = {Std} STATUS_SYNTAX_ERROR [0x05]

 

We can see that you have enabled all polling technologies, including the proprietary ones and those reserved for future use (RFU). 

Can you please keep only Type A enabled and try it out? This can be done in the libnfc-nci.conf. 

Once you change the settings in the libnfc-nci.conf, you need to "push" this file into NFC Controller (PN7160). 

 

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lukas-janik
Contributor III

Hello,

thank you for such a deep investigation. In fact reducing technologies is one of first things that I have tried but thought that the libnfc-nci.conf is taken into account for every operation with libnfc-nci library.

Can I push the configuration using nfcDemoApp or do I need some special tool?

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Fabian_R
NXP TechSupport
NXP TechSupport

Hello sir,

There is no need to use any special tool. The DemoApp you are using is the following project: GitHub - NXPNFCLinux/linux_libnfc-nci: Linux NFC stack for NCI based NXP NFC Controllers

Inside the directory conf, you will find the libnfc-nci.conf file.

In PN7160 Linux porting guide

section 5.1 Installation instructions you will see the steps to rebuild the project with your new configurations.

Hope this information may have been useful

Best Regards,
Fabian
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lukas-janik
Contributor III

Hello Fabian,

the root cause of the problem with libnfc-nci.conf was, that the GetNumValue() parser from libnfc-nci silently ignored HOST_LISTEN_TECH_MASK, POLLING_TECH_MASK and P2P_LISTEN_TECH_MASK. All these remained default, which is the full technology scope, including proprietary technologies.

The app now continues further, but still not quite where I wanted to be:

These are last lines of the communication dump with updated technology settings:

2018:03:09-13:10:41.178	 len =   7 > 20020401850101
2018:03:09-13:10:41.178	 len =   5 > 4002020000
2018:03:09-13:10:41.179	 len =  31 > 21011C000402091039D2760000850101010300010301030011040103000105
2018:03:09-13:10:41.183	 len =   4 > 41010100
2018:03:09-13:10:41.184	 len =  26 > 20021701291446666D010112020207FF03020003040164070103
2018:03:09-13:10:41.184	 len =   5 > 4002020000
2018:03:09-13:10:41.185	 len =  19 > 20021005300104310100320120380100500100
2018:03:09-13:10:41.201	 len =   5 > 4002020000
2018:03:09-13:10:41.201	 len =   8 > 200205010002F401
2018:03:09-13:10:41.202	 len =   5 > 4002020000
2018:03:09-13:10:41.202	 len =   8 > 2103050200018001
2018:03:09-13:10:41.204	 len =   4 > 41030100
2018:03:09-13:10:41.205	 len =   4 > 21060100

I have set all the HOST_LISTEN_TECH_MASK, POLLING_TECH_MASK and P2P_LISTEN_TECH_MASK to 0x01.

In 2103050200018001 It can be seen, that there are only 2 technologies selected - NFC_A_PASSIVE_POLL_MODE and NFC_A_PASSIVE_LISTEN_MODE.

Followed by response 41030100 which should mean NCI_STATUS_OK.

The demoApp then sends RF_DISCOVER_MAP_CMD with 0 mapping configurations and aborts.

Right now I'm investigating whether this is caused by some mis-configuration, or a bug in the nfcDemoApp.

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Fabian_R
NXP TechSupport
NXP TechSupport

Hello sir,

Thank you for letting us know of this issue. I will share this with the respective team.

This is correct, you are setting core set config with 2103050200018001 correctly.

In UM11495, section 10.1.1 RF Discovery State Machine after every RF SET state, it is sending a RF DEACTIVATE CMD in order to start a new state.

Please keep in mind that the demo is only showing it's features.

Would you mind sharing if the tag has been detected yet?

Best Regards,
Fabian
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lukas-janik
Contributor III

Hello Fabian,

the tag still was not detected, the application Aborts right after sending the DEACTIVATE CMD.

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lukas-janik
Contributor III

The default value for both NXP_EXT_TVDD_CFG_1 and NXP_EXT_TVDD_CFG_2 byte #9 is 0x01 so I suppose this is most probably the issue

Not sure if I manage to test it on the HW today, but it sounds very promising. Thank you!

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Fabian_R
NXP TechSupport
NXP TechSupport

 

Hello sir,

Thank you very much for contacting us.

Regarding this issue. I believe you should not need any additional adjustments since the SPI example doesn't mentions it requires additional RF settings.

Since PN7160 is a controller that doesn’t allow any SW internal changes, the Reader should correctly detect and communicate with the Reader. Also, since this is an evaluation board's RF settings sent should be correctly configured for the practical demonstration. Have you contacted MikroE for this?

Please keep in mind that our support is limited to our NXP Evaluation Kit.

Best Regards,
Fabian
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lukas-janik
Contributor III

Hello Fabian, thank you for prompt response.

I have also tried with OM27160A1HN EVK with same results. 

Is there anything that I could check? VDD and VBAT is both connected to 3V3 supply. I tried to change NXP_EXT_TVDD_CFG to 0x1 but nothing changed.

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Fabian_R
NXP TechSupport
NXP TechSupport

Hello sir,

We do provide the examples for a list of MCUs and MPUs from NXP unfortunately, the support for non-NXP hosts is limited. Could you please clarify that you are receiving the expected responses from the PN7160.

In UM11495, section 8.4 Whole sequence to prepare the PN7160 operation. There is a Figure where is shown the Initialization sequence.

Please share the logs with our evaluation kit please.

Best Regards,
Fabian
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lukas-janik
Contributor III

Hello Fabian,

I'm not sure if I understand the first paragraph - my host MPU is RPi CM4, it is connected to the PN7160 EVK via standard I2C@400 kHz and GPIO pins. Based on nfcDemoApp verbose output and capture from logic analyzer I suppose that the communication is OK.

I haven't found section 8.4 in UM11495 https://www.nxp.com/docs/en/user-manual/UM11495.pdf . Which Figure do you mean?

Logs with log level 0x3 are attached below.

Thank you,
Lukas

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Fabian_R
NXP TechSupport
NXP TechSupport

Hello sir,

Yes, I believe from the I2C layer, the connection doesn't show any errors.

I'm not sure if you have, but as mentioned in section 8.2 of PN7160 Linux porting guide you could run the NFC Factory test app, you could test if you can turn on the RF.

Also, in section 5.3 Configuration files from PN7160 Linux porting guide there are a number of log levels to be configured.

Sorry, from the User Manual I was referring to section 6.3 Whole sequence to prepare the PN7160 operation as you can see from your log you do get some of the command responses but, is possible that there is an issue with your porting possibly the transport layer driver isn't correctly interfacing with the TL firmware. By running the Factory test app will give us a better idea of where the problem is.

Best Regards,
Fabian
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lukas-janik
Contributor III

Hello Fabian and sorry for the late reply.

I have ran the factory test app and it seems that every part of it works, including the RF Activation. Following is the dump of RF settings:

Dumping all RF settings:
 transition 0x00, register 0x42 = 02 FF FF
 transition 0x00, register 0x43 = 01 A0
 transition 0x00, register 0x7F = 04 4B 00 50 09
 transition 0x02, register 0x33 = 04 0F 81 01 00
 transition 0x02, register 0x34 = 04 07 20 00 00
 transition 0x02, register 0x35 = 04 F4 01 F4 01
 transition 0x02, register 0x41 = 01 82
 transition 0x02, register 0x42 = 04 00 00 FF FF
 transition 0x02, register 0x44 = 04 00 00 D4 00
 transition 0x02, register 0x45 = 04 40 80 00 00
 transition 0x02, register 0x47 = 01 00
 transition 0x02, register 0x48 = 01 00
 transition 0x02, register 0xFE = 04 1F 00 00 00
 transition 0x04, register 0x33 = 04 0F 40 04 00
 transition 0x04, register 0x35 = 04 00 3E 00 00
 transition 0x04, register 0x40 = 01 00
 transition 0x04, register 0x44 = 04 00 08 F6 00
 transition 0x04, register 0x45 = 04 80 40 00 00
 transition 0x04, register 0x47 = 01 00
 transition 0x04, register 0x4A = 04 00 00 00 00
 transition 0x06, register 0x35 = 04 F4 05 70 02
 transition 0x06, register 0x42 = 04 F8 40 FF FF
 transition 0x08, register 0x15 = 01 00
 transition 0x08, register 0x16 = 04 AE 00 1F 00
 transition 0x08, register 0x2B = 02 88 09
 transition 0x08, register 0x2C = 04 14 F0 4D B2
 transition 0x08, register 0x2D = 04 0D 25 2C 01
 transition 0x08, register 0x2E = 04 20 0F 00 00
 transition 0x08, register 0x2F = 04 EF AD 80 01
 transition 0x08, register 0x30 = 04 70 00 18 00
 transition 0x08, register 0x37 = 04 08 76 00 00
 transition 0x08, register 0x3F = 04 00 00 00 00
 transition 0x08, register 0x41 = 01 40
 transition 0x08, register 0x42 = 04 00 02 FF FF
 transition 0x08, register 0x44 = 04 04 04 C4 00
 transition 0x08, register 0x45 = 04 83 60 40 05
 transition 0x08, register 0x85 = 04 25 13 00 00
 transition 0x09, register 0x2F = 04 00 00 00 01
 transition 0x09, register 0x30 = 04 00 00 00 00
 transition 0x09, register 0x37 = 04 00 00 00 00
 transition 0x09, register 0x3F = 01 08
 transition 0x09, register 0x41 = 01 03
 transition 0x09, register 0x42 = 04 01 10 FF FF
 transition 0x09, register 0x85 = 04 00 00 00 00
 transition 0x0C, register 0x40 = 01 01
 transition 0x0C, register 0x45 = 04 C3 82 71 05
 transition 0x0C, register 0x47 = 01 02
 transition 0x10, register 0x2D = 04 0D 25 2C 01
 transition 0x10, register 0x2E = 01 60
 transition 0x10, register 0x2F = 04 EF AD 80 01
 transition 0x10, register 0x30 = 04 70 00 18 00
 transition 0x10, register 0x33 = 04 03 40 04 80
 transition 0x10, register 0x34 = 04 F7 7F 10 08
 transition 0x10, register 0x35 = 01 0C
 transition 0x10, register 0x40 = 02 00 00
 transition 0x10, register 0x44 = 01 60
 transition 0x10, register 0x45 = 04 80 40 00 00
 transition 0x10, register 0x47 = 01 00
 transition 0x10, register 0x48 = 01 10
 transition 0x11, register 0x2F = 04 00 00 00 01
 transition 0x11, register 0x30 = 04 00 00 00 00
 transition 0x11, register 0x48 = 01 00
 transition 0x11, register 0x85 = 04 00 00 00 00
 transition 0x12, register 0x16 = 01 00
 transition 0x12, register 0x35 = 01 0C
 transition 0x12, register 0x37 = 04 00 00 00 00
 transition 0x1A, register 0x33 = 04 4B 02 01 00
 transition 0x1A, register 0x34 = 04 D5 92 E1 03
 transition 0x1C, register 0x44 = 04 05 04 C4 00
 transition 0x1C, register 0x85 = 04 25 03 00 00
 transition 0x1E, register 0x33 = 04 4B 02 01 00
 transition 0x1E, register 0x34 = 04 D5 92 E1 03
 transition 0x20, register 0x17 = 04 00 00 80 00
 transition 0x20, register 0x2D = 04 50 44 0C 00
 transition 0x20, register 0x33 = 04 03 01 00 50
 transition 0x20, register 0x34 = 04 00 00 EC 03
 transition 0x20, register 0x44 = 04 55 0A 00 00
 transition 0x22, register 0x2E = 02 02 60
 transition 0x22, register 0x44 = 04 05 04 C4 00
 transition 0x22, register 0x85 = 04 25 03 00 00
 transition 0x24, register 0x03 = 01 7F
 transition 0x28, register 0x16 = 01 00
 transition 0x2A, register 0x41 = 01 8E
 transition 0x2C, register 0x16 = 01 00
 transition 0x2E, register 0x41 = 01 8E
 transition 0x30, register 0x15 = 01 00
 transition 0x30, register 0x16 = 04 1F 00 FF FF
 transition 0x30, register 0x41 = 01 82
 transition 0x30, register 0x42 = 02 88 40
 transition 0x30, register 0x4A = 04 00 00 00 00
 transition 0x31, register 0x16 = 04 00 00 00 00
 transition 0x34, register 0x2B = 02 0C 00
 transition 0x34, register 0x2E = 02 20 69
 transition 0x34, register 0x44 = 04 04 04 C4 00
 transition 0x34, register 0x85 = 04 25 13 00 00
 transition 0x36, register 0x2E = 02 40 69
 transition 0x36, register 0x2F = 04 EF F9 80 08
 transition 0x36, register 0x30 = 04 E0 00 30 00
 transition 0x36, register 0x45 = 01 70
 transition 0x37, register 0x45 = 01 60
 transition 0x38, register 0x2E = 02 60 69
 transition 0x38, register 0x2F = 04 AF 5C 80 08
 transition 0x38, register 0x30 = 04 40 00 20 00
 transition 0x38, register 0x44 = 04 02 04 C4 00
 transition 0x38, register 0x85 = 04 25 03 00 00
 transition 0x3A, register 0x2E = 02 60 79
 transition 0x3A, register 0x2F = 04 51 0E 10 C1
 transition 0x3A, register 0x30 = 04 26 00 08 00
 transition 0x3A, register 0x44 = 04 11 00 C4 00
 transition 0x3A, register 0x85 = 04 0B 03 00 00
 transition 0x3C, register 0x2D = 04 DC 40 04 00
 transition 0x3C, register 0x33 = 04 4B 02 01 70
 transition 0x3C, register 0x34 = 04 D5 92 E0 03
 transition 0x3C, register 0x44 = 04 66 0A 00 00
 transition 0x3E, register 0x2D = 04 05 35 1E 01
 transition 0x3E, register 0x33 = 04 0B 83 00 00
 transition 0x3E, register 0x34 = 04 00 80 E1 03
 transition 0x3E, register 0x44 = 04 65 09 00 00
 transition 0x40, register 0x2D = 04 05 45 1E 01
 transition 0x40, register 0x33 = 04 0B 83 00 00
 transition 0x40, register 0x34 = 04 00 80 E1 03
 transition 0x40, register 0x44 = 04 65 09 00 00
 transition 0x42, register 0x2D = 04 05 25 0F 01
 transition 0x42, register 0x33 = 04 0B 83 00 00
 transition 0x42, register 0x34 = 04 00 80 E1 03
 transition 0x42, register 0x44 = 04 55 0A 00 00
 transition 0x44, register 0x2F = 04 E3 AD 80 04
 transition 0x44, register 0x30 = 04 70 00 18 00
 transition 0x44, register 0x44 = 04 04 04 C4 00
 transition 0x44, register 0x85 = 04 25 13 00 00
 transition 0x46, register 0x2F = 04 E7 5D 80 08
 transition 0x46, register 0x30 = 04 B0 00 45 00
 transition 0x48, register 0x2F = 04 EF 5D 80 08
 transition 0x48, register 0x30 = 04 B0 00 45 00
 transition 0x4A, register 0x2F = 04 6F 5C 80 04
 transition 0x4A, register 0x30 = 04 70 00 18 00
 transition 0x4C, register 0x2D = 04 15 34 1F 01
 transition 0x4C, register 0x44 = 04 65 0A 00 00
 transition 0x4E, register 0x2D = 04 05 35 1E 01
 transition 0x4E, register 0x44 = 04 65 09 00 00
 transition 0x50, register 0x2D = 04 05 35 1E 01
 transition 0x50, register 0x44 = 04 65 09 00 00
 transition 0x52, register 0x2D = 04 05 25 0F 01
 transition 0x52, register 0x44 = 04 65 0A 00 00
 transition 0x56, register 0x2B = 02 80 00
 transition 0x56, register 0x2F = 04 EF A9 80 01
 transition 0x56, register 0x30 = 01 00
 transition 0x57, register 0x30 = 01 00
 transition 0x58, register 0x2B = 02 80 08
 transition 0x58, register 0x2F = 04 0F 5D 20 08
 transition 0x5E, register 0x2D = 04 0D 48 0C 01
 transition 0x5E, register 0x44 = 04 55 08 00 00
 transition 0x60, register 0x2D = 04 0D 5A 0C 01
 transition 0x60, register 0x44 = 04 55 08 00 00
 transition 0x62, register 0x2B = 02 0C 00
 transition 0x62, register 0x2F = 04 EF AD 80 01
 transition 0x62, register 0x44 = 04 04 04 C4 00
 transition 0x62, register 0x85 = 04 25 13 00 00
 transition 0x64, register 0x2B = 02 8D 00
 transition 0x64, register 0x2F = 04 EF A9 80 01
 transition 0x66, register 0x2B = 02 8E 08
 transition 0x66, register 0x2F = 04 0F 5D 20 08
 transition 0x70, register 0x16 = 04 8E 00 1F 00
 transition 0x72, register 0x03 = 01 3D
 transition 0x72, register 0x0D = 01 24
 transition 0x72, register 0x14 = 01 24
 transition 0x72, register 0x15 = 01 01
 transition 0x72, register 0x16 = 01 01
 transition 0x72, register 0x41 = 04 82 07 00 00
 transition 0x72, register 0x42 = 02 F8 40
 transition 0x72, register 0x4A = 04 53 07 00 1B
 transition 0x73, register 0x41 = 01 00
 transition 0x74, register 0x0D = 01 11
 transition 0x74, register 0x14 = 01 11
 transition 0x74, register 0x15 = 01 00
 transition 0x74, register 0x16 = 01 00
 transition 0x74, register 0x42 = 02 68 40
 transition 0x74, register 0x4A = 04 56 07 01 1B
 transition 0x76, register 0x0D = 01 08
 transition 0x76, register 0x14 = 01 08
 transition 0x76, register 0x15 = 01 00
 transition 0x76, register 0x16 = 01 00
 transition 0x76, register 0x42 = 02 68 40
 transition 0x76, register 0x4A = 04 56 07 01 1B
 transition 0x78, register 0x0D = 01 04
 transition 0x78, register 0x14 = 01 04
 transition 0x78, register 0x15 = 01 00
 transition 0x78, register 0x16 = 01 00
 transition 0x78, register 0x41 = 01 8E
 transition 0x78, register 0x42 = 02 F0 40
 transition 0x78, register 0x4A = 04 11 07 01 1B
 transition 0x82, register 0x0F = 04 6C 01 04 00
 transition 0x82, register 0x15 = 01 00
 transition 0x82, register 0x16 = 01 00
 transition 0x82, register 0x42 = 02 68 40
 transition 0x82, register 0x4A = 04 33 07 00 07
 transition 0x84, register 0x15 = 01 00
 transition 0x84, register 0x16 = 01 00
 transition 0x84, register 0x42 = 02 68 40
 transition 0x84, register 0x4A = 04 13 07 01 07
 transition 0x86, register 0x15 = 01 00
 transition 0x86, register 0x16 = 01 00
 transition 0x86, register 0x42 = 02 68 40
 transition 0x86, register 0x4A = 04 12 07 01 07
 transition 0x88, register 0x15 = 01 00
 transition 0x88, register 0x16 = 01 00
 transition 0x88, register 0x42 = 02 68 40
 transition 0x88, register 0x4A = 04 11 07 01 07
 transition 0x92, register 0x33 = 01 04
 transition 0x94, register 0x15 = 01 00
 transition 0x94, register 0x16 = 01 00
 transition 0x94, register 0x42 = 02 78 40
 transition 0x94, register 0x4A = 04 43 07 00 07
 transition 0x96, register 0x15 = 01 00
 transition 0x96, register 0x16 = 01 00
 transition 0x96, register 0x42 = 02 80 40
 transition 0x96, register 0x4A = 04 11 07 01 07
 transition 0x98, register 0x15 = 01 01
 transition 0x98, register 0x16 = 01 01
 transition 0x9A, register 0x15 = 01 00
 transition 0x9A, register 0x16 = 01 00
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