They do this because this is the nature of SPI bus and this is how bus communications is done. Look:
Data transmission
Every SPI clock cycle is a full duplex data transmission. The master sends a bit on the MOSI pin and the slave reads it, while the slave sends a bit on the MISO pin and the master reads it. This sequence is true even if you only need an one-directional data transfer.
Hello,
Same thread is opened here https://community.nxp.com/t5/NXP-Model-Based-Design-Tools/SPI-Setup-Menu/m-p/1282847#M6096
Let's solve the issue there.
Regards,
Marius