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- Re: Pwm_delay_in_trigger_pulse
Pwm_delay_in_trigger_pulse
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SOLVED
09-16-2024
10:49 PM
11,368 Views
Vijay98
Contributor II
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Hello NXP team,
Currently we are generating the pwm pulse for two channels.
and with pwm channel 1 pulse, we are triggering the pwm channel 2 pulse with edge triggering.
but with triggering, there is some delay in Pwm channel 2 pulse and that delay is not constant it is getting varying from one pulse to another pulse.
Photo - 1: 820uS delay for pwm 2.
Photo - 2: no delay for pwm 2.
Photo - 3: 520uS delay for pwm 2.
we don't know how to reduce this delay, and it is not constant delay.
We have attached the configuration settings for this pwm pulse below,
Emios_0 - Channel_0 for pwm2 pulse
Emios_1 - Channel_0 for pwm1 pulse
Mcl_configuration for Pwm2 pulse
Kindly help us to resolve this issue related to pwm delay.
Thanks, and regards,
Esakki.P
@Irina_Costachescu @dragostoma
Solved! Go to Solution.
1 Solution
12-11-2024
11:00 AM
9,484 Views
stefanvlad
NXP Employee
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Hi @Vijay98 ,
I'm not sure what do you mean having an issue on PTC10, since on this thread Re: Pwm_delay_in_trigger_pulse - NXP Community, the solution works well and tested on logic analyzer.
Can you provide pictures of the model that you modified based on the steps i provided in the thread above, instead of reposting my screenshots.
Once again to use another pin to output the signal from PTA3 to PTC10 there are only two options, one is presented above by using PTC10 as emios_0_ch6 and the other solution is to use PTC10 as lcu1_out11:
Then you need to route the signal from PTA3 (lcu0_out2) to PTC10 (lcu1_out11) using TRGMUX:
Then we need to update the LCU configuration for the new input:
And then we update the LCU output config:
Also PTC10 pin needs to be added into the Port peripheral:
and the last step is to update the model with the new LCU output:
After this, clean up the local Matlab folder, delete the .slxc file, and the folders 32k312_pwm_lcu_mod_carrier_s32ct_ert_rtw, and slprj:
Then rebuild and flash the project on the S32K312 board, and check the pins with logic analyzer:
And to summarize the complete application, how all the peripherals are connected, I have created this diagram:
This are all the steps needed, please read them carefully and replicate them on your model,
Best regards,
Stefan V.
Reply
21 Replies
10-28-2024
11:43 PM
1,727 Views
DrKarthi
Contributor II
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kindly update the solution for above issue.
or it will be helpful if we discuss in a teams call.
