Pwm_delay_in_trigger_pulse

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Hello NXP team,

Currently we are generating the pwm pulse for two channels.

and with pwm channel 1 pulse, we are triggering the pwm channel 2 pulse with edge triggering.

but with triggering, there is some delay in Pwm channel 2 pulse and that delay is not constant it is getting varying from one pulse to another pulse.

Photo - 1: 820uS delay for pwm 2.

Photo - 2: no delay for pwm 2.

Photo - 3: 520uS delay for pwm 2.

we don't know how to reduce this delay, and it is not constant delay.

We have attached the configuration settings for this pwm pulse below,

Emios_0 - Channel_0 for pwm2 pulse

Emios_1 - Channel_0 for pwm1 pulse

Mcl_configuration for Pwm2 pulse

Kindly help us to resolve this issue related to pwm delay.

Thanks, and regards,

Esakki.P

@Irina_Costachescu @dragostoma

@DrKarthi

1 解答

9,569 次查看

Hi @Vijay98 ,

I'm not sure what do you mean having an issue on PTC10, since on this thread Re: Pwm_delay_in_trigger_pulse - NXP Community, the solution works well and tested on logic analyzer.

Can you provide pictures of the model that you modified based on the steps i provided in the thread above, instead of reposting my screenshots.

Once again to use another pin to output the signal from PTA3 to PTC10 there are only two options, one is presented above by using PTC10 as emios_0_ch6 and the other solution is to use PTC10 as lcu1_out11: