Hi @stefanvlad ,
I am using a MC33664 transciever evalboard which is connected to a board with a BCC MC33771C.
I can provide a connection table between the S32K344T172 EVB and the FRDM33664BEVBUG:
| S32K344T172 EVB | FRDM33664BEVBUG |
| LPSPI1_SCK | PTB14 | J4-11 | SCLK_TX | J1-9 |
| LPSPI1_PCS3 | PTB17 | J4-5 | CSB_TX | J1-14 |
| LPSPI1_SOUT | PTB16 | J4-7 | DATA_TX | J2-8 |
| LPSPI4_SCK | PTB10 | J4-12 | SCLK_RX | J9-7 |
| LPSPI4_PCS0 | PTC10 | J4-3 | CSB_RX | J9-5 |
| LPSPI4_SIN | PTB11 | J39-11 | DATA_RX | J2-19 |
| INTB | PTB13 | J2-4 | INTB | J1-8 |
| EN | PTB12 | J2-1 | EN | J2-18 |
| 5V | | J39-13 | VCC | J9-10 |
3V3 | | J39-10 | VCCIO | J9-8 |
| GND | | | GND | J2-14;J9-12;J9-14 |
LPSPI1 is set as Master and LPSPI4 is set as Slave.
The baudrate for both LPSPI peripherals is set to 2MHz.
The master send command works well and the BCC device is able to read the data and send a reply. The problem I've encoutered is with the Slave recieve command, it seems that either the timing of the recieve command is bad or maybe I've missed something while setting up the slave based on the example I was doing from the previous post.
Recently I've tried running the slave recieve block during a hardware interrupt which is triggered after the master send transmission ends. I've added a Led enable block to debug the interrupt.

From the logic analysis it seems that the transmit sequence ends in the middle of the recieve sequence, thus LSPSPI4 cannot recieve the whole message. Though I am not entirely sure about that. From the SPI_GetSequenceResult block for LPSPI1 recieve the result is written as 2 which means that the sequence ended in failure.