user-defined ISR and FIFO queues

[emilien]

Hi,

  I need some advice with my software design:

My ADCs are constantly feeding a buffer. Because I needed responsiveness, I don't use MQX interrupts and I installed user-defined interrupts instead. Some other task will read in the ADC buffer and apply filtering. This buffer is fixed size and I'm not sure if I will drop data that would cause overflow or if I will make the buffer circular.

In the end I think this is more or less a producer/consumer issue, with my ADCs interrupts being producers.

What kind of task synchronization tool would you choose? I could see that lightweight events are used to signal interrupts to tasks, but I think in my case lightweight semaphores would be appropriate, what do you think? I'm looking at the MQX examples but if you know a good way to achieve this it would be helpful : )

Best regards,

--

Emilien

[c0170]

Hello emilien,

 If you are feeding (circular) buffer, the feeding is not atomic. That's why you can get into not consistent state if 2 concurrent pieces of code are modifying buffer pointers (producer and consumer pointers) and feeding data with buffers.

You have to keep in mind that low priority task handling buffer can be interrupted with high priority interrupt handling the same buffer. The easiest synchronization is: to disable interrupt in the task - modify buffer - enable interrupt and deffer ISR.

Even if access to the head/teal is atomic, still be careful about the code order. Check the status (empty/full), fill the data, update index. Probably buffer needs one empty space to be used (Size-1 used) for a situation head=tail (is empty or full?).

Regards,

MartinK