Hi Norm Davies, Yes, you are right. Hence we have tried to work with RAM segment as below.MEMORY
{
vectorrom (RX): ORIGIN = 0x00000000, LENGTH = 0x00000400
cfmprotrom (R): ORIGIN = 0x00000400, LENGTH = 0x00000020
rom (RX): ORIGIN = 0x00000420, LENGTH = 0x0007FBE0 /* Code + Const data / my_ram (RW): ORIGIN = 0x1FFF0000, LENGTH = 0x00010000 / SRAM - RW data / ram (RW): ORIGIN = 0x20000000, LENGTH = 0x0000FA00 / SRAM - RW data */
/* kernel space starts after RAM variables (Location of MQX Kernel data + MQX heap) */
end_of_kd (RW): ORIGIN = 0x2000FFF0, LENGTH = 0x00000000
/* Boot stack reused by MQX Kernel data */
bstack (RW): ORIGIN = 0x2000FA00, LENGTH = 0x00000200 /* Boot stack */
end_bstack (RW): ORIGIN = 0x2000FC00, LENGTH = 0x00000000 /* Boot stack end address requires 4B alignment */
}SECTIONS{ __INTERNAL_SRAM_BASE = 0x20000000; __INTERNAL_SRAM_SIZE = 0x0000FA00; .... }.my_section { __my_section_start = .; . = ALIGN (0x4);;;;;;;;;;;; additional variables are defined here... } > my_ram But this has also not resolve the problem.Is there any error in above procedure ?It will be nice if you can give us the sample method to define memory blocks in RAM segments.Do you recommend to use MQX 4.2.0 as against MQX 4.1.0 ? Some one has advise to use MQX 4.2.0 along with patch MQX 4.2.0.1.regds,Dinesh
From: ndavies <admin@community.freescale.com>
To: Dinesh Sonagra <rnd.himson@yahoo.co.in>
Sent: Saturday, 13 February 2016 12:11 AM
Subject: Re: - Use of SRAM beyond 64K for K60 controller with MQX RTOS-RTCS using CodeWarrior
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Use of SRAM beyond 64K for K60 controller with MQX RTOS-RTCS using CodeWarrior
reply from Norm Davies in Kinetis Microcontrollers - View the full discussionOn the 128 K parts you must make sure variables aren't straddling the 64K boundary. The parts have 2 SRAM blocks. Atomic reads and writes cannot span the 64k boundary between the 2 blocks. On our products, the division between SRAM blocks fell within our heap. We allocated and orphaned a memory allocation on the dividing line.
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