TWR-SER2 with TWRK60D100M

cancel
Showing results for 
Search instead for 
Did you mean: 

TWR-SER2 with TWRK60D100M

991 Views
jainsubhav
Contributor I

I have successfully implemented the eth-to-serial example from MQX4.1 onto TWRSER PCB. but now i want to implement the same on TWRSER2 device.

I have made following changes in code but still no success.

Our changes w.r.t default TWRK60d100M BSP

In init_enet.c

#include "phy_dp83xxx.h" instead of #include “phy_ksz8041.h”

2.  In init_enet.c

const ENET_IF_STRUCT ENET_0 = {

    &MACNET_IF,

//&phy_ksz8041_IF, 

    &phy_dp83xxx_IF,

    MACNET_DEVICE_0,

    MACNET_DEVICE_0,

    BSP_ENET0_PHY_ADDR, // = 1

       BSP_ENET0_PHY_MII_SPEED

};

  3. Add files dp8xxx.c and dp8xxx.h in phy folder

  4. In twrk60d100m.bat we have added copy "%ROOTDIR%\mqx\source\io\enet\phy\phy_dp83xxx.h" "%OUTPUTDIR%\phy_dp83xxx.h" /Y and removed copy "%ROOTDIR%\mqx\source\io\enet\phy\phy_ksz8041.h" "%OUTPUTDIR%\phy_ksz8041.h" /Y

5. TWR-SER2 setting is as per attached file Ethernet.jpg.

6. if ((*enet_ptr->PARAM_PTR->ENET_IF->MAC_IF->PHY_READ)(enet_ptr, DP83XXX_REG_BMCR, &phy_status, MII_TIMEOUT)) { we are getting 0 in phy_status which I think chip is not responding.

Thanks in Advance.

Labels (1)
0 Kudos
6 Replies

567 Views
isaacavila
NXP Employee
NXP Employee

Hello Jain,

It seems to be a hardware problem:

When you power up all Tower System from TWR-K60D100M's J17 connector (OJTAG), you can see that clock signal has some distortion on it (Primary Elevator on pin B24):

Figure 2.jpg

this does not happen when you use TWR-SER board.

However, if you power up all Tower System from Primary USB connector (J5) you can ensure that clock signal is cleaner:

Figure 1.jpg

But due to Eth-to-serial demo uses UART from J17 connector ('ittyf:') you must connect also your USB cable on J17.

If you test using both connections (J17 on TWR-K60D100M and Powering System up in J5 from Primary Elevator) you would see that demo is working fine.

You can test it and if problem persist, please let me know it.

Regards,

Isaac Avila

0 Kudos

567 Views
jainsubhav
Contributor I

Hello Isaac Avila,

The suggestion given by you is working fine.

My application demands me to test the DP83849 (Ethernet connections) for the various mode checking like LOOPBACK, BIST apart from normal communications.

I have made a Loopback cable as

1. Cut a cable with about 1 foot of cable and the RJ45 connector.

2. Bend back pairs 4/5 and 7/8 (these will not be used)

3. Solder wire 1 to wire 3

4. Solder wire 2 to wire 6

But I am not able to test it. Kindly suggest how to test it, in your current eth-to-serial example.

I have to test my code for these conditions.

1. 1) Test in BIST mode when using an external loopback plug.

2. 2) Test with packet traffic from the MAC while configured for internal loopback.

3. 3) Test with packet traffic from the MAC when using an external loopback plug.

4. 4) Test with packet traffic while connected to a link partner via a standard cable.

Please help me to define test procedure for above test cases.

Thanks in advance

0 Kudos

567 Views
isaacavila
NXP Employee
NXP Employee

Hi Jain,

What you are trying to do is to test Ethernet packets on MAC and LLC layers so these tests cannot be achieved on Ethernet-to-serial example due this example included TCP and other layer packets.

You should try using Ethernet drivers where enet module is initialized and try to send packet using your Loopback cable on it.

These drivers are provided on (KINETIS512_V2_SC.zip):

Kinetis K60 100 MHz MCU Tower System Module|Freescale

Although there is no Ethernet example on given sample code , you can duplicate a hello world project and try using enet drivers.

Attach you can find another documents where a enet module configuration is done (and other peripherals as well) and have a better idea how to implement your testing code.

Regards,

Isaac Avila

0 Kudos

567 Views
jainsubhav
Contributor I

Dear Mr. Isaac Avila

I am currently facing an issues. On my actual hardware I have DP83848t IC from TI only. Attached is the schematic of the same.

But my code stucks at __msgq_send_internal() at location

if (blocking)

{

if ( ! kernel_data->IN_ISR)

{

td_ptr = kernel_data->ACTIVE_PTR;

td_ptr->STATE = SEND_BLOCKED;

taskblock();

} /* Endif */

}

And never comes back from this blocking state. I am not able to establish a connection between PC and MK60DX256VLL10.

Kindly help on the same issue.

Thanks & Regards

Subhav Jain

0 Kudos

567 Views
isaacavila
NXP Employee
NXP Employee

Hi Subhav,

has your problem been resolved?

Best regards,

Isaac

0 Kudos

567 Views
isaacavila
NXP Employee
NXP Employee

Hi Subhav Jain,

Could you please share your code? I need to know if configuration was done correctly

Regards,

Isaac

0 Kudos