Support for FlexNVM on FTFE driver

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Support for FlexNVM on FTFE driver

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922 Views
Contributor IV

Hi,

I'm using the MK64FX512 chip and want to use the FlexNVM as d-flash. I wish I could use the MQX flashx driver IO functions to access it, but just realized that the MQX FTFE driver is not ready to deal with FlexNVM memory (only the FTFL driver has support).

So, even configuring the flashX parameters on my BSP (banks and addresses) I won't be able to read/write to FlexNVM through flashx driver, right? (I don't want the FlexRAM functionality).

Is there already some code for this? Any ideas on how can I get this working in a quick way?

Thanks!

Luiz Fernando

(before anyone asks, I didn't go for the MK64FN1M0 because it was out of stock on the main suppliers and because it is more expensive)

1 Solution
88 Views
Contributor IV

Thanks RadekS! For sure it served me as nice inspiration!

Indeed there is something missing in your code that I found in this thread: Re: K20 FlexNVM with Flashx which was preventing it from work. The FTFE write AND erase functions require the FlexNVM 32-bit address to be translated to 24-bit address, so the following code is necessary on flash_ftfe.c erase and write sector functions.


flash_ftfe.c (insert marked code on ftfe_flash_erase_sector and ftfe_flash_write_sector functions)

write_addr = (_mem_size) from_ptr;


if (write_addr & 0x10000000)

    write_addr |= 0x00800000;


I've not tested the FlexRAM+EEPROM functionality (after a lot of tests I realized that most of the sample code you supplied is not needed for FlexNVM D-flash usage  only, but I kept it in my installation for the future).


I've also seen something that I can't quite understand in your code, also in the flash_ftfe.c file:


flash_ftfe.c FLASHX_BLOCK_INFO_STRUCT

const FLASHX_BLOCK_INFO_STRUCT _flashx_kinetisX_block_map[] = {

    { BSP_INTERNAL_FLASH_SIZE / BSP_INTERNAL_FLASH_SECTOR_SIZE / 2, (uint32_t) BSP_INTERNAL_FLASH_BASE, BSP_INTERNAL_FLASH_SECTOR_SIZE },

    { BSP_INTERNAL_FLASH_SIZE / BSP_INTERNAL_FLASH_SECTOR_SIZE / 2, (uint32_t) BSP_INTERNAL_FLASH_BASE, BSP_INTERNAL_FLASH_SECTOR_SIZE },

    { BSP_INTERNAL_FLASH_SIZE / BSP_INTERNAL_FLASH_SECTOR_SIZE, (uint32_t) __FLASHX_START_ADDR, BSP_INTERNAL_FLASH_SECTOR_SIZE }, // D-Flash blocks

    { 1, (uint32_t) BSP_INTERNAL_FLEXRAM_BASE, BSP_INTERNAL_FLEXRAM_SIZE },

    { 0, 0, 0 }

}


Why two blocks defined to begin in the same place and with the same size in the internal flash?

In my code I've kept MQX defaults and configured two blocks in the internal flash. (from beginning to half and from half to end). I don't also undestand why two blocks on MQX as theoretically there is only one flash block on internal flash. I found contraditory information about this issue along Freescale documents.

So my FLASHX_BLOCK_INFO_STRUCT was configured as this:

My FLASHX_BLOCK_INFO_STRUCT

const FLASHX_BLOCK_INFO_STRUCT _flashx_kinetisX_block_map[] = {

    { BSP_INTERNAL_FLASH_SIZE / BSP_INTERNAL_FLASH_SECTOR_SIZE / 2, (uint32_t) BSP_INTERNAL_FLASH_BASE,              BSP_INTERNAL_FLASH_SECTOR_SIZE },

    { BSP_INTERNAL_FLASH_SIZE / BSP_INTERNAL_FLASH_SECTOR_SIZE / 2, (uint32_t) BSP_INTERNAL_FLASH_BASE + 1 * BSP_INTERNAL_FLASH_SIZE / 2, BSP_INTERNAL_FLASH_SECTOR_SIZE },

  { BSP_INTERNAL_FLEXNVM_SIZE / BSP_INTERNAL_FLASH_SECTOR_SIZE, (uint32_t) BSP_INTERNAL_FLEXNVM_BASE, BSP_INTERNAL_FLASH_SECTOR_SIZE },

    { 0, 0, 0 }

}


And it looks like it is working fine!


Thank you again!

Luiz Fernando

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88 Views
NXP Employee
NXP Employee

In attachment you can find modified files for K64 FlexNVM support (based on frdmk64f BSP).

Please use it as inspiration.

I hope it helps you.

Have a great day,
RadekS

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

89 Views
Contributor IV

Thanks RadekS! For sure it served me as nice inspiration!

Indeed there is something missing in your code that I found in this thread: Re: K20 FlexNVM with Flashx which was preventing it from work. The FTFE write AND erase functions require the FlexNVM 32-bit address to be translated to 24-bit address, so the following code is necessary on flash_ftfe.c erase and write sector functions.


flash_ftfe.c (insert marked code on ftfe_flash_erase_sector and ftfe_flash_write_sector functions)

write_addr = (_mem_size) from_ptr;


if (write_addr & 0x10000000)

    write_addr |= 0x00800000;


I've not tested the FlexRAM+EEPROM functionality (after a lot of tests I realized that most of the sample code you supplied is not needed for FlexNVM D-flash usage  only, but I kept it in my installation for the future).


I've also seen something that I can't quite understand in your code, also in the flash_ftfe.c file:


flash_ftfe.c FLASHX_BLOCK_INFO_STRUCT

const FLASHX_BLOCK_INFO_STRUCT _flashx_kinetisX_block_map[] = {

    { BSP_INTERNAL_FLASH_SIZE / BSP_INTERNAL_FLASH_SECTOR_SIZE / 2, (uint32_t) BSP_INTERNAL_FLASH_BASE, BSP_INTERNAL_FLASH_SECTOR_SIZE },

    { BSP_INTERNAL_FLASH_SIZE / BSP_INTERNAL_FLASH_SECTOR_SIZE / 2, (uint32_t) BSP_INTERNAL_FLASH_BASE, BSP_INTERNAL_FLASH_SECTOR_SIZE },

    { BSP_INTERNAL_FLASH_SIZE / BSP_INTERNAL_FLASH_SECTOR_SIZE, (uint32_t) __FLASHX_START_ADDR, BSP_INTERNAL_FLASH_SECTOR_SIZE }, // D-Flash blocks

    { 1, (uint32_t) BSP_INTERNAL_FLEXRAM_BASE, BSP_INTERNAL_FLEXRAM_SIZE },

    { 0, 0, 0 }

}


Why two blocks defined to begin in the same place and with the same size in the internal flash?

In my code I've kept MQX defaults and configured two blocks in the internal flash. (from beginning to half and from half to end). I don't also undestand why two blocks on MQX as theoretically there is only one flash block on internal flash. I found contraditory information about this issue along Freescale documents.

So my FLASHX_BLOCK_INFO_STRUCT was configured as this:

My FLASHX_BLOCK_INFO_STRUCT

const FLASHX_BLOCK_INFO_STRUCT _flashx_kinetisX_block_map[] = {

    { BSP_INTERNAL_FLASH_SIZE / BSP_INTERNAL_FLASH_SECTOR_SIZE / 2, (uint32_t) BSP_INTERNAL_FLASH_BASE,              BSP_INTERNAL_FLASH_SECTOR_SIZE },

    { BSP_INTERNAL_FLASH_SIZE / BSP_INTERNAL_FLASH_SECTOR_SIZE / 2, (uint32_t) BSP_INTERNAL_FLASH_BASE + 1 * BSP_INTERNAL_FLASH_SIZE / 2, BSP_INTERNAL_FLASH_SECTOR_SIZE },

  { BSP_INTERNAL_FLEXNVM_SIZE / BSP_INTERNAL_FLASH_SECTOR_SIZE, (uint32_t) BSP_INTERNAL_FLEXNVM_BASE, BSP_INTERNAL_FLASH_SECTOR_SIZE },

    { 0, 0, 0 }

}


And it looks like it is working fine!


Thank you again!

Luiz Fernando

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88 Views
NXP Employee
NXP Employee

As I said, attached document was indeed for your inspiration.

It was created on request from customer, but I don’t have any board with MK64FX chip. Therefore I was not able test it on real MCU.

You are right, code could contain some issues and I would like to thank you for sharing modifications with us.

I am glad that it works now.

I hope it helps you.

Have a great day,
RadekS

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

88 Views
Contributor IV

Hi @Radek Sestak,

Thanks for the source files. Now I am able to access FlexNVM as well as EEEProm on my MK64FX512 board running on MQX-4.2.

Expected actions

Three blocks of data, assume 500 byte size, to be saved in FlexNVM(1 at the beginning block and the other at the end of the FlexNVM) and EEEPROM. To be able to read these after reboot and update them randomly if there is any change in data. 

Current Scenario:

I am able to access the FlexNVM and EEEPROM. Any data written here is retained during resets/power losses.

Problem:  

Random reads on both sections is not possible. I am able to read both FlexNVM and EEEProm sequentially.

My settings are as follows:

#define BSP_INTERNAL_FLASH_BASE    0x00000000

#define BSP_INTERNAL_FLASH_SIZE    0x00100000

#define BSP_INTERNAL_FLASH_SECTOR_SIZE 0x1000

#define BSP_INTERNAL_FLEXRAM_BASE       0x14000000

#define      BSP_INTERNAL_FLEXRAM_SIZE 0x00001000

#define BSP_INTERNAL_FLEXNVM_BASE  (0x10000000)

#define BSP_FLEXNVM_SECTOR_SIZE         (0x400)

//#define BSP_INTERNAL_FLEXNVM_SIZE  (0x00020000) //128KB

//#define BSP_INTERNAL_FLEXNVM_SIZE  (0x00010000) //64KB

#define BSP_INTERNAL_FLEXNVM_SIZE  (0x00008000) //32KB

 

 

#define BSP_EE_DATA_SIZE_CODE               (FLEXNVM_EE_SPLIT_1_1 | FLEXNVM_EE_SIZE_1024)

/* EESIze = 1024, EESplit = 1/2 */

#define BSP_FLEXNVM_PART_CODE                        (FLEXNVM_PART_CODE_DATA64_EE64)

/* DEPART setting for 64K Dflash and 64K Eflash */

Attaching the test code to verify this. Random reads are removed from this code. 

Is it possible to read random locations and write to random locations on FlexNVM and EEEProm? 

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NXP TechSupport
NXP TechSupport

Hi  CSMG Sarma

Please be kindly noted that

Simultaneous data flash operations and FlexRAM writes, when FlexRAM is used for EEE, are not possible

Regards

Daniel

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NXP Employee
NXP Employee

Hi CSMG Sarma,

Unfortunately, I do not support MQX for last three years. Therefore, I am not sure whether I am able to help you correctly.

Hi danielchen@fsl , could you please look at this update instead of me?

Best regards

Radek