MQX Vybrid Clock Setup

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MQX Vybrid Clock Setup

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Contributor III

I noticed that in version MQX 4.2.0 that the CCM_CCR register (Vybrid processor) shows 0x00010005 indicating that it is running from the FIRC oscillator (instead of the FXOSC). I see in the init_hw.c file that the FXOSC is turned on. But on running my app, the CCR reg shows 0x00010005. When is the init_hardware function (which calls clocks_init) called? It appears from the comments in the file (init_hw.c)  that it is called as part of the boot process. I can't find a place where it is called within MQX.

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Contributor III

What I've noticed is that MQX doesn't ever call the function Cpu_SetClockConfiguration to set the clock. It assumes that the clocks were set up in the bootup code. Therefore when downloading the code and running with the debugger, the clocks are not necessarily initialized the way they would be during a proper bootup.

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Contributor III

I should add to the above that the code that is running is downloaded via a debugger. It is not being run with any boot code. The DDR is initialized via a macro file (IAR IDE) before the real code is actually run. I know that there is some code that runs before MQX starts, and it may be in that code that init_hw is called. If that's the case, then I need to create another macro file to set up the clocks before MQX runs. Is one available?

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NXP TechSupport
NXP TechSupport

Hi Ken:

The clock configuration is configured in mqx/source/bsp/[svf522revb_a5.m4]/bsp_cm.c

LDD_TError Cpu_SetClockConfiguration(LDD_TClockConfiguration ModeID)
{
  if (ModeID > 0x02U) {
    return ERR_RANGE;                  /* Undefined clock configuration requested requested */
  }
  switch (ModeID) {
    case CPU_CLOCK_CONFIG_0:
        CCM_CCSR |= CCM_CCSR_FAST_CLK_SEL_MASK;  // fast clock select, 24Mhz FXOSC
        CCM_CCSR |= CCM_CCSR_SYS_CLK_SEL_PLL1_PFD;  // system clock select, PLL1_PFD
        CCM_CCR &= ~CCM_CCR_FIRC_EN_MASK;    // enable FIRC
        break;
    case CPU_CLOCK_CONFIG_1:
        CCM_CCR |= CCM_CCR_FIRC_EN_MASK;    // enable FIRC
        CCM_CCSR &= ~CCM_CCSR_FAST_CLK_SEL_MASK; // fast clock select
        CCM_CCSR &= ~CCM_CCSR_SYS_CLK_SEL_MASK;  // system clock select
        break;
    case CPU_CLOCK_CONFIG_2:
        break;
    default:
        break;
  }
  LDD_SetClockConfiguration(ModeID);   /* Call all LDD components to update the clock configuration */
  ClockConfigurationID = ModeID;       /* Store clock configuration identifier */
  return ERR_OK;

Regards

Daniel

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