K60 SPI PE, no delay between char

[aroste]

Hi,

CW 10.4, MQX 4.0

I saw a lot of comments about this SPI but just not what I'm looking for, or links could be helpful.

I use the function "..._Inc_SendBlock" generated from PE.  In the PE settings page of my SPI I set a delay between chars.

If my block has 3 bytes, should these delay between these 3 bytes ?

Because I don't have any delay between, I even have the CLK time between 2 bytes that is shorter than the normal clock period.

Final use is:

One SPI connected device (accelerometer) need a delay between command byte and data out. So I wanted to set the delay between char corresponding to the needed delay. Doing will do that CS is still asserted, CLK is hold, and then continues for next byte after the delay.  But that doesn't work.

Thanks

BR

-stéphan-

[egoodii]

Hardware can help 'up to a point' -- check out register SPIx_CTARn, PDT and DT.  These will define your time-between-operations.  If that doesn't do it for you (and it didn't for me!) here is another trick I used IF you can de-assert CS during the delay:  Define the GPIO function of that 'pin' as output, state to match your inactive CS state.  Then after the 'first set' of your transactions have completed (which you can tell if the 'matching' number of RX transactions have occurred) then flip the CS pin over to GPIO mode, do the 'delay time' transaction, and when THAT is 'done' flip the pin back to SPI-controlled.  That lets the SPI hardware 'time' the gap for you in a 'full transaction' time.